Senior ASIC Digital Design Lead - High-Speed IP & SoC

Cisco Systems, Inc.; Allentown (Lehigh County); On-site; USD 178,000 - 257,000; Full time

Job summary

Cisco Systems, Inc. in the Silicon One Optics group seeks a Digital Design Technical Leader to own the full ASIC lifecycle—from concept to tapeout and post-silicon production.

You will guide cross-functional teams across digital, analog, firmware and physical design, shaping architectures and integrating cutting-edge high-speed IPs for 100G/200G/400G interfaces. This role offers impact on next-gen optical interconnects powering AI-era data centers, with opportunities to drive technical strategy

Qualifications

• Bachelors + 12 years of related experience, or Masters + 8 years, or PhD + 5 years.
• Experience with FSMs, CPU subsystems, complex SoCs, and FPGA validation.
• Experience managing the complete ASIC/SoC design flow.
• Experience with high-speed SerDes, Ethernet, and/or D2D PHY IP.

Responsibilities

• Own the full ASIC lifecycle from concept to tapeout and post-silicon production.
• Lead cross-functional teams across digital, analog, firmware and physical design.
• Define digital architectures and integrate high-speed IPs for 100G–400G silicon photonics.

Skills

ASIC design leadership

Digital design experience

High-speed SerDes & IPs

FPGA validation

Education

Bachelor's degree in Electrical Engineering or related field

Job description

Cisco Systems, Inc. in the Silicon One Optics group seeks a Digital Design Technical Leader to own the full ASIC lifecycle—from concept to tapeout and post-silicon production.

You will guide cross-functional teams across digital, analog, firmware and physical design, shaping architectures and integrating cutting-edge high-speed IPs for 100G/200G/400G interfaces. This role offers impact on next-gen optical interconnects powering AI-era data centers, with opportunities to drive technical strategy