Lead ASIC Chip Design Expert — Full-Chip Tapeout

Eridu Corporation; Saratoga (CA); On-site; USD 250,000 - 280,000; Full time

Job summary

A Silicon Valley hardware startup is seeking an ASIC Chip Design Lead to drive chip design execution from micro-architecture through full-chip integration. This technical role requires hands-on RTL development, managing cross-functional design teams, and ensuring timing closure for full-chip designs. Ideal candidates will have extensive experience in RTL design, micro-architecture, and a proven track record of successful full-chip tape-outs, making impactful contributions to AI infrastructure technology.

Qualifications

• Strong hands-on experience with RTL design and micro-architecture.
• Proven experience with full-chip integration and timing closure.
• Led at least one full-chip tape-out within the last 3 years.

Responsibilities

• Own chip design execution from micro-architecture through full-chip integration.
• Drive RTL and micro-architecture while leading cross-functional teams.
• Perform detailed code reviews and set technical standards for RTL quality.

Skills

RTL design

Micro-architecture

Full-chip integration

Timing closure

Job description

A Silicon Valley hardware startup is seeking an ASIC Chip Design Lead to drive chip design execution from micro-architecture through full-chip integration. This technical role requires hands-on RTL development, managing cross-functional design teams, and ensuring timing closure for full-chip designs. Ideal candidates will have extensive experience in RTL design, micro-architecture, and a proven track record of successful full-chip tape-outs, making impactful contributions to AI infrastructure technology.