Digital IC Design Lead — AI-Driven Tapeout Platform

AIDAChip Inc; San Francisco, Northern (CA, KY); Hybrid; USD 180,000 - 290,000; Full time

Job summary

AIDAChip Inc in San Francisco is seeking a senior leader for digital IC design to define what is “correct” for the platform’s AI teammates, ensuring tapeouts meet customer expectations and guiding the behavior of the design fleet.

You will own architecture, RTL, DV, synthesis and place-and-route, and collaborate with forward-deployed engineers on customer playbooks. Strong emphasis on measurable results and end-to-end ownership.

Qualifications

• 10+ years in digital IC design and hands-on depth in at least two of design, verification, or physical implementation

Responsibilities

• Own the digital AI teammate platform architecture, RTL, DV, and the handoffs between agents.
• Specify what "correct" means for each digital teammate and set the bar for customer-facing tapeouts.
• Drive mixed-signal seams including AMS flows and real-number modeling at top level integration.

Skills

Digital IC design

Functional verification

Physical implementation

SystemVerilog/UVM

Synthesis

Place-and-route

Signoff

Static timing analysis

Clock domain crossing

UPF

Tools

Synopsys

Cadence

Siemens

Job description

AIDAChip Inc in San Francisco is seeking a senior leader for digital IC design to define what is “correct” for the platform’s AI teammates, ensuring tapeouts meet customer expectations and guiding the behavior of the design fleet.

You will own architecture, RTL, DV, synthesis and place-and-route, and collaborate with forward-deployed engineers on customer playbooks. Strong emphasis on measurable results and end-to-end ownership.