Senior ASIC RTL Design Lead — Remote (US)

10xTalents; San Francisco (CA); On-site; USD 130,000 - 160,000; Full time

Job summary

A technology company is seeking a senior-level Lead ASIC RTL Design Engineer to develop high-performance silicon components for advanced compute platforms. This role involves defining microarchitecture, leading front-end design, and guiding less experienced engineers. The ideal candidate will have over 8 years of experience in ASIC design, strong skills in System Verilog, and a Bachelor's or Master's degree in Electrical/Computer Engineering. The position is remote, based in the U.S., and does not offer visa sponsorship.

Qualifications

• 8+ years of experience in ASIC or SoC RTL design for complex, high-speed devices.
• Demonstrated experience delivering designs from concept through RTL implementation and tape out readiness.
• Strong System Verilog expertise.

Responsibilities

• Define microarchitecture for complex subsystems and document design specifications.
• Lead front-end design activities including linting and synthesis readiness.
• Design and integrate high-bandwidth interfaces.

Skills

System Verilog expertise

Communication skills

Technical leadership

Front-end design tools

Education

Bachelor's or Master's degree in Electrical or Computer Engineering

Tools

Python

Tcl

Job description

A technology company is seeking a senior-level Lead ASIC RTL Design Engineer to develop high-performance silicon components for advanced compute platforms. This role involves defining microarchitecture, leading front-end design, and guiding less experienced engineers. The ideal candidate will have over 8 years of experience in ASIC design, strong skills in System Verilog, and a Bachelor's or Master's degree in Electrical/Computer Engineering. The position is remote, based in the U.S., and does not offer visa sponsorship.