Lead RTL Architect for ASIC/SoC

Bolt Graphics; Sunnyvale (CA); On-site; USD 220,000 - 250,000; Full time

Benefits offered by this job

100% covered medical, dental, & vision premiums

Stock options

401(k) match

WFH hardware

Job summary

A semiconductor startup in Sunnyvale is seeking an RTL Design Tech Lead to oversee micro-architecture and RTL development for complex ASIC/SoC programs. This role requires deep design expertise and technical leadership to guide teams through the architecture and tapeout phases. Ideal candidates will have extensive experience in ASIC/SoC RTL design, strong knowledge of SystemVerilog, and proven track records in project leadership and silicon success. The compensation ranges between $220,000 to $250,000 per year.

Qualifications

• 10+ years of experience in ASIC/SoC RTL design.
• Proven experience leading blocks through multiple tapeouts.
• Hands-on experience with synthesis tools.

Responsibilities

• Own end-to-end RTL design for major subsystems.
• Define micro-architecture aligned with PPA targets.
• Drive design reviews, coding standards, and best practices.

Skills

SystemVerilog / Verilog RTL coding

Micro‑architecture design

Strong debugging and problem‑solving ability

Excellent communication across teams

Education

Bachelor’s or Master’s in Electrical / Computer Engineering

Tools

Design Compiler

Python

Tcl

Job description

A semiconductor startup in Sunnyvale is seeking an RTL Design Tech Lead to oversee micro-architecture and RTL development for complex ASIC/SoC programs. This role requires deep design expertise and technical leadership to guide teams through the architecture and tapeout phases. Ideal candidates will have extensive experience in ASIC/SoC RTL design, strong knowledge of SystemVerilog, and proven track records in project leadership and silicon success. The compensation ranges between $220,000 to $250,000 per year.