IC Package Engineer - 2.5D/3D Packaging & SI/PI

Gsme; San Jose, Northern (CA, KY); Hybrid; USD 110,000 - 170,000; Full time

Job summary

Gsme seeks an Advanced IC Package Engineer to join our Advanced Package Design team in California. The role focuses on real-world semiconductor packaging, including 2.5D/3D packaging, interposers, and modern design methodologies.

You will gain hands-on experience with multi-layer MLO/RDL layouts and ceramic substrates, while growing under senior mentorship. The ideal candidate has 2+ years in package layout, a strong grasp of SI/PI fundamentals, and is motivated to work across cross-disciplinary

Qualifications

• Bachelors in Electrical/Mechanical/Industrial Engineering, Applied Physics, or related field with strong fundamentals.
• 2+ years of experience in layout of multi-layer MLO/RDL and ceramic substrates.
• Good understanding of impedance control, return paths, and inductance loops.
• Exposure to SI/PI on SERDES, DDR, HSIO routing and familiarity with Cadence tools.

Responsibilities

• Support layout of multi layer MLO/RDL and ceramic substrate packages.
• Work on multi layer stackups including core and coreless packages.
• Apply impedance control, manage return paths and minimize inductance loops.
• Contribute to SI/PI aware routing for SERDES, DDR, HSIO.
• Collaborate with thermal, mechanical, electrical, reliability, and component teams.

Skills

Layout design

MLO/RDL layout

Ceramic substrates

Signal integrity

Power integrity

Impedance control

Return paths

Inductance minimization

SERDES DDR HSIO routing

Cadence tools

Cross-functional collaboration

Education

Bachelor's degree in Electrical Engineering

Tools

Cadence tools

Job description

Gsme seeks an Advanced IC Package Engineer to join our Advanced Package Design team in California. The role focuses on real-world semiconductor packaging, including 2.5D/3D packaging, interposers, and modern design methodologies.

You will gain hands-on experience with multi-layer MLO/RDL layouts and ceramic substrates, while growing under senior mentorship. The ideal candidate has 2+ years in package layout, a strong grasp of SI/PI fundamentals, and is motivated to work across cross-disciplinary