Senior Package Layout Engineer - 3D IC/Photonic

Socket.dev; Mountain View (CA); Hybrid; USD 157,000 - 176,000; Full time

Benefits offered by this job

Health care plan

Retirement match

Life Insurance

Generous time off

Family leave

Disability insurance

Training & development

Commuter benefits

Hybrid workplace

Equity grants

Job summary

Lightmatter is seeking a Package Layout Design Engineer to drive next‑gen products from concept to development. You will join the Signal Integrity, Power Integrity and Packaging team to deliver substrate layouts that meet SI/PI/DFM requirements across multiple packaging technologies.

Responsibilities include floorplanning, collaboration with suppliers, and delivering FSM/DFM compliant layouts. Ideal candidates have 5+ years in IC package layout and proficiency with Allegro X APD and related

Qualifications

• B.S. or M.S. in Electrical Engineering or related field with at least 5 years of experience.
• 3–5 years of IC package layout design experience.
• Proficiency with Allegro X APD and knowledge of IC package substrates.

Responsibilities

• Deliver IC package substrate layouts for standard and advanced packaging technologies.
• Provide floorplanning and preliminary substrate designs to optimize stack-up.
• Collaborate with OSATs and substrate suppliers on layout rules and implementation.

Skills

IC package layout

Cross-functional collaboration

Communication skills

Education

B.S./M.S. in Electrical Engineering

Tools

Allegro X APD

Cadence Integrity 3DIC

Expedition Package Designer

Pads Layout

Altium

Python or SKILL

Job description

Lightmatter is seeking a Package Layout Design Engineer to drive next‑gen products from concept to development. You will join the Signal Integrity, Power Integrity and Packaging team to deliver substrate layouts that meet SI/PI/DFM requirements across multiple packaging technologies.

Responsibilities include floorplanning, collaboration with suppliers, and delivering FSM/DFM compliant layouts. Ideal candidates have 5+ years in IC package layout and proficiency with Allegro X APD and related