IC Package Design Engineer - 2.5D/3D Packaging Expert

Rivian Automotive; Palo Alto, Irvine (CA, CA); On-site; USD 186,000 - 296,000; Full time

Benefits offered by this job

Health insurance

401(k) Plan with match

Equity awards

Job summary

Rivian Automotive is seeking an IC Package Design Engineer to lead physical layout, modeling, and analysis of advanced semiconductor packaging solutions for high-performance ICs. You will collaborate with IC Design, SI/PI, PCB Layout, Mechanical, Thermal, and Test teams, plus OSAT partners, to deliver robust packaging from concept to production.

Responsible for end-to-end layout, advanced packaging methods (FCBGA, SiP, 2.5D/3D), co-design with silicon and board teams, and ensuring DFM/DFT

Qualifications

• B.S. or M.S. in Electrical Engineering, Computer Engineering, Materials Science, Mechanical Engineering, or a related field.
• 3+ years (5+ years preferred) of hands-on experience in semiconductor package and substrate layout design, particularly for high-speed (SerDes) and high di/dt IC applications.
• Proven expertise with industry-standard packaging EDA tools such as Cadence Allegro APD/SiP, Cadence Virtuoso, Synopsys 3DICC, Siemens Xpedition Package Designer, or Calibre/KLayout.
• Strong foundational knowledge of electromagnetics, impedance control, crosstalk minimization, substrate materials, thermal management, and mechanical reliability.
• Solid understanding of DFM/DFT principles, JEDEC standards, DRC/LVS signoff flows, and reliability qualification processes.
• Hands-on experience with heterogeneous integration, chiplet architectures, silicon interposers, and 2.5D/3D IC packaging technologies.
• Experience working with OSATs, substrate manufacturers, and foundry packaging teams.

Responsibilities

• End-to-End Package Layout: die placement, bump assignment, floor planning, ball map optimization.
• Advanced Packaging Implementations: FC-BGA, SiP, 2.5D/3D IC architectures.
• Silicon, Package & Board Co-Design: die/package/PCB co-design and interposer routing.
• High-Speed & Power Delivery Network: define route of DDR/PCIe/SerDes and PDN with high di/dt.
• EDA Tooling: create, manage, and validate layouts using Cadence/Synopsys/Siemens tools.
• Verification & Signoff: DRC/LVS checks, netlist verification, DFM/DFT reviews.
• Manufacturing Collateral: generate Gerbers, ODB++ and BOMs for tapeout.
• Multi-Disciplinary Convergence: collaborate with SI/PI, thermal, and mechanical teams.
• Vendor & OSAT Integration: interface with foundries and OSATs for design feasibility and tapeouts.
• Bring-up & Test Support: assist lab bring-up and silicon validation with test engineering.
• Workflow Automation: develop scripts to automate layout flows.
• AI/ML Innovation: apply AI/ML for layout optimization and rule checks.

Skills

SerDes

High-speed packaging

DFM/DFT

Scripting (Python/Tcl/Perl/MATLAB)

OSAT collaboration

Thermal management

Electromagnetics basics

Education

B.S./M.S. in Electrical/Mechanical/Materials Science

Tools

Cadence Allegro APD/SiP

Cadence Virtuoso

Synopsys 3DICC

Siemens Xpedition Package Designer

Calibre/KLayout

Job description

Rivian Automotive is seeking an IC Package Design Engineer to lead physical layout, modeling, and analysis of advanced semiconductor packaging solutions for high-performance ICs. You will collaborate with IC Design, SI/PI, PCB Layout, Mechanical, Thermal, and Test teams, plus OSAT partners, to deliver robust packaging from concept to production.

Responsible for end-to-end layout, advanced packaging methods (FCBGA, SiP, 2.5D/3D), co-design with silicon and board teams, and ensuring DFM/DFT