Senior IC Package Layout Lead (2.5D/3D-IC)

Amazon Inc.; Arizona; Hybrid; USD 150,000 - 230,000; Full time

Benefits offered by this job

RSUs

Sign-on payments

Health insurance

401(k) matching

Paid time off

Job summary

Annapurna Labs, an AWS organization, is seeking a Sr. Package Layout Engineer to lead end-to-end physical design of advanced IC packages for data center accelerators.

You will own package layout from floor planning to tape-out, driving 2.5D/3D-IC and interposer architectures with cross-functional teams. Expect to collaborate with silicon, SI/PI, thermal and manufacturing groups to meet performance, density and reliability targets.

Qualifications

• Bachelor's degree in Electrical Engineering or related field.
• 10+ years of experience in IC package layout and physical design.
• Proven track record of leading package designs from concept through tape out.
• Hands-on expertise with major package layout tools.
• Deep understanding of advanced packaging technologies: 2.5D/3D-IC, fan-out WLP, RDL, TSV.

Responsibilities

• Lead the full package layout cycle from die floor planning to tape out release.
• Drive physical design of advanced packaging architectures including 2.5D/3D-IC.
• Define and optimize package floorplans for high-density interconnects.
• Perform detailed RDL and substrate routing for high-density interconnects.
• Collaborate with ASIC PD teams to ensure co-optimization of die-package interfaces.
• Drive cross-level layout co-optimization across die RDL, interposer/substrate, and PCB.
• Develop and maintain package stack-up definitions with SI/PI teams.
• Create and enforce package design rules with OSAT partners.
• Run physical verifications and drive design closure with zero escapes.
• Mentor junior layout engineers and contribute to best practices.

Skills

10+ years in IC package layout and PD

Lead package designs from concept to t

2.5D/3D-IC, fan-out WLP, RDL, TSV, BGA

DFM constraints & physicalVerification

Bump map / ball map definition & power

Substrate/interposer manufacturing & C

Mentor junior layout engineers

OSAT/foundry collaboration for NPI

Impedance-controlled routing & PDN

Education

Bachelor's degree in Electrical Engineering or related field

Master's degree or equivalent in EE / related field

Tools

Cadence APD/SiP

Synopsys IC Packaging

Mentor Xpedition

Job description

Annapurna Labs, an AWS organization, is seeking a Sr. Package Layout Engineer to lead end-to-end physical design of advanced IC packages for data center accelerators.

You will own package layout from floor planning to tape-out, driving 2.5D/3D-IC and interposer architectures with cross-functional teams. Expect to collaborate with silicon, SI/PI, thermal and manufacturing groups to meet performance, density and reliability targets.