Hybrid VLSI Verification Intern (SystemVerilog/AI)

Hewlett Packard Enterprise Company; Fort Collins (CO); Hybride; USD 48 000 - 56 000; Plein temps

Résumé du poste

Hewlett Packard Enterprise is seeking a VLSI Design Verification Intern to join a Hybrid work arrangement, average two days per week in an HPE office. You will contribute to Slingshot ASIC verification, learning SystemVerilog/UVM and collaborating with architects and designers on complex HPC interconnect projects.

Ideal candidates are pursuing a degree in EE/CE/CS with ASIC/VLSI coursework, scripting skills, and interest in AI-assisted verification workflows.

Qualifications

• Pursuing a bachelor’s or master’s in Electrical/Computer Engineering or CS.
• Coursework in digital design and computer architecture.
• Experience with object-oriented programming.
• Strong analytical and problem-solving skills.
• Clear written and verbal communication skills.
• Willingness to ask questions, explain your reasoning, and participate in technical discussions.

Responsabilités

• Develop SystemVerilog and UVM testbench components, including models, monitors, scoreboards, and checkers.
• Write constrained-random tests.
• Develop and analyze functional coverage to identify verification gaps.
• Debug regression failures and help identify, log, and resolve logic bugs.
• Work directly with ASIC designers and architects.
• Use scripting, automation, and AI-assisted tools to improve the verification process.

Connaissances

Strong analytical and problem-solving

Object-oriented programming

Formation

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science

Outils

Verilog/SystemVerilog/VHDL

Python

Linux

Description du poste

Hewlett Packard Enterprise is seeking a VLSI Design Verification Intern to join a Hybrid work arrangement, average two days per week in an HPE office. You will contribute to Slingshot ASIC verification, learning SystemVerilog/UVM and collaborating with architects and designers on complex HPC interconnect projects.

Ideal candidates are pursuing a degree in EE/CE/CS with ASIC/VLSI coursework, scripting skills, and interest in AI-assisted verification workflows.