Hybrid Senior ASIC Verification Engineer SystemVerilog UVM

Hewlett Packard Enterprise; Chippewa Falls, Fort Collins, BLOOMINGTON (WI, CO, MN); Hybrid; USD 140,000 - 321,000; Full time

Benefits offered by this job

Hybrid work model

Health benefits

Job summary

Hewlett Packard Enterprise is seeking a Senior ASIC Design Verification Engineer to join the Slingshot program in Chippewa Falls, WI or other U.S. locations.

The role requires leading all pre-silicon verification phases and mentoring teammates in a geographically distributed environment. The position offers a hybrid work pattern with two in-office days on average, leveraging advanced SystemVerilog/UVM verification methods and AI-assisted tooling to accelerate coverage and bug closure.

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.
• 10+ years of experience in VLSI design, verification, or implementation.

Responsibilities

• Follow and help define the team's design verification methodology.
• Develop SystemVerilog and UVM testbench components, including bus functional models that drive and monitor stimulus.
• Plan and implement block and integration level scoreboards and checkers to verify functional behavior.
• Write and analyze functional coverage, providing input to block level milestones.
• Triage regression failures and identify logic bugs, while driving bug closure.
• Apply scripting, automation, and AI-assisted and agentic tools to improve the speed and quality of the verification process.
• Provide guidance and mentoring to less experienced staff members to set an example of VLSI design and development innovation and excellence.
• Participate in and provide input on the process for selection of future technical leaders.
• Drive VLSI innovation and integration of new technologies into projects and activities in the design organization.

Skills

SystemVerilog

UVM

OVM

Python

Perl

Tcl

EDA tools

FPGA tools

Distributed team

Communication

Education

Bachelor's degree in Electrical Engineering

Master's degree

Tools

Linux development

Git

Job description

Hewlett Packard Enterprise is seeking a Senior ASIC Design Verification Engineer to join the Slingshot program in Chippewa Falls, WI or other U.S. locations.

The role requires leading all pre-silicon verification phases and mentoring teammates in a geographically distributed environment. The position offers a hybrid work pattern with two in-office days on average, leveraging advanced SystemVerilog/UVM verification methods and AI-assisted tooling to accelerate coverage and bug closure.