Hybrid VLSI Design Verification Intern

Hewlett Packard Enterprise Development LP; Fort Collins (CO); Hybrid; USD 48.000 - 56.000; Teilzeit

Benefits dieser Stelle

Health & Wellbeing

Career Development

Inclusive culture

Zusammenfassung

Hewlett Packard Enterprise invites students to join as a VLSI Design Verification Intern in Colorado, a hybrid role requiring about two days per week in an office. You will collaborate with ASIC designers and architects on a future Slingshot-based project, applying SystemVerilog, UVM, and scripting to improve verification and debugging workflows.

Ideal candidates are pursuing a degree in EE/CE/CS with coursework in digital design and computer architecture, and experience in object-oriented

Qualifikationen

• Pursuing a bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field
• Coursework in digital design and computer architecture
• Experience with object-oriented programming
• Strong analytical and problem-solving skills
• Clear written and verbal communication skills
• Willingness to ask questions, explain your reasoning, and participate in technical discussions

Aufgaben

• Develop SystemVerilog and UVM testbench components, including models, monitors, scoreboards, and checkers
• Write constrained-random tests
• Develop and analyze functional coverage to identify verification gaps
• Debug regression failures and help identify, log, and resolve logic bugs
• Work directly with ASIC designers and architects
• Use scripting, automation, and AI-assisted tools to improve the verification process

Kenntnisse

Object-oriented programming

SystemVerilog

Python

Verilog

Linux

AI tooling familiarity

Ausbildung

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science

Tools

Verilog

SystemVerilog

VHDL

Python

Perl

Tcl

Jobbeschreibung

Hewlett Packard Enterprise invites students to join as a VLSI Design Verification Intern in Colorado, a hybrid role requiring about two days per week in an office. You will collaborate with ASIC designers and architects on a future Slingshot-based project, applying SystemVerilog, UVM, and scripting to improve verification and debugging workflows.

Ideal candidates are pursuing a degree in EE/CE/CS with coursework in digital design and computer architecture, and experience in object-oriented