Hybrid Senior ASIC Verification Engineer

Hewlett Packard Enterprise Development LP

Sunnyvale (CA)

Hybrid

USD 159,000 - 321,000

Full time

5 days ago
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Job summary

Hewlett Packard Enterprise Development LP is seeking a Senior ASIC Verification Engineer to lead VLSI verification efforts in a hybrid work model. You’ll design, validate and optimize complex ASIC blocks, mentor engineers, and collaborate with SW and logic teams to ensure robust chip solutions.

The role emphasizes SystemVerilog/UVM, formal verification, and advanced debugging across full-chip scope, with strong problem-solving and communication skills required.

Qualifications

  • Bachelor's or Master's in EE/CE or equivalent.
  • 6–10 years in VLSI design, verification or implementation.
  • Expert in VLSI fundamentals, digital logic, and computer architecture.
  • Proficient in Perl/Python/C/C++ and scripting.
  • Experience with UVM-based block and full-chip test benches.

Responsibilities

  • Lead project teams of VLSI engineers across design, verification and validation.
  • Review designs for compliance with VLSI standards and provide feedback.
  • Provide architecture guidance and platform leadership on cross‑organization projects.
  • Mentor junior staff and contribute to leadership development.
  • Develop modular tests and test benches using SystemVerilog/UVM.

Skills

VLSI concepts
SystemVerilog/UVM
C/C++
Python/Perl
English communication
Team leadership

Education

Bachelor's or Master's degree in Electrical or Computer Engineering

Tools

SystemVerilog
UVM
Formal verification tools
Code coverage tools

Job description

Hewlett Packard Enterprise Development LP is seeking a Senior ASIC Verification Engineer to lead VLSI verification efforts in a hybrid work model. You’ll design, validate and optimize complex ASIC blocks, mentor engineers, and collaborate with SW and logic teams to ensure robust chip solutions.

The role emphasizes SystemVerilog/UVM, formal verification, and advanced debugging across full-chip scope, with strong problem-solving and communication skills required.

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