Senior ASIC Verification Engineer – Hybrid (Slingshot)

Hobbsnews; Chippewa Falls (WI); On-site; USD 135,000 - 311,000; Full time

Job summary

Hewlett Packard Enterprise is seeking a Senior ASIC Design Verification Engineer for a hybrid role requiring on-average 2 days per week in an HPE office in the Chippewa Falls, WI area. The role focuses on verification of the Slingshot interconnect ASICs, leading verification scope and driving AI-assisted workflows to accelerate results.

You will collaborate with architects and verification engineers, own verification blocks, and influence verification methodologies while mentoring junior

Qualifications

• Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent.
• 10+ years of experience in VLSI design, verification, or implementation.

Responsibilities

• Follow and help define the team's design verification methodology.
• Develop SystemVerilog and UVM testbench components, including bus functional models.
• Plan and implement block and integration level scoreboards and checkers to verify functional behavior.
• Write and analyze functional coverage, providing input to block level milestones.
• Triage regression failures and identify logic bugs, while driving bug closure.
• Apply scripting, automation, and AI-assisted tools to improve speed and quality of verification.
• Provide guidance and mentoring to less experienced staff to model VLSI innovation.
• Participate in and provide input on the process for selecting future technical leaders.

Skills

SystemVerilog

UVM/OVM

Programming languages

Scripting

Analytical thinking

Distributed team work

Excellent communication

Education

Bachelor's or Master's in EE/CE/CS

Job description

Hewlett Packard Enterprise is seeking a Senior ASIC Design Verification Engineer for a hybrid role requiring on-average 2 days per week in an HPE office in the Chippewa Falls, WI area. The role focuses on verification of the Slingshot interconnect ASICs, leading verification scope and driving AI-assisted workflows to accelerate results.

You will collaborate with architects and verification engineers, own verification blocks, and influence verification methodologies while mentoring junior