Hybrid VLSI Design Intern - ASIC Verification

Hewlett Packard Enterprise Development LP; Spring (TX); Hybrid; USD 48,000 - 56,000; Part time

Benefits offered by this job

Hybrid work arrangement

Job summary

Hewlett Packard Enterprise Development LP is seeking a VLSI Engineer Intern in Texas for a hybrid role with an average of 2 days per week in an HPE office. You will explore the full VLSI design flow, including system integration, circuit design, and verification, and contribute to ASIC verification under an experienced team.

The internship emphasizes strong communication, time management and organizational skills, plus knowledge of Verilog/VHDL and EDA tools.

Qualifications

• Pursuing Bachelor's degree in EE, CE or equivalent.
• Familiarity with Verilog/VHDL and EDA tools.
• Strong communication and organizational skills.

Responsibilities

• Analyze the specification to learn about the design
• Work closely with architecture and RTL designers on verifying the functionality correctness of the design
• Develop test cases and test plans
• Implementing test benches, generating directed/constrained random tests
• Running and triaging regressions, tracking bugs
• Assisting in verification flows, automation scripts and regressions
• Collaborates and communicates with management regarding design status, project progress, and issue resolution

Skills

VLSI principles

Python

Verilog/VHDL

OOP fundamentals

Education

Pursuing Bachelor's degree (Electrical Engineering, Computer engineering or equivalent)

Tools

EDA tools

Job description

Hewlett Packard Enterprise Development LP is seeking a VLSI Engineer Intern in Texas for a hybrid role with an average of 2 days per week in an HPE office. You will explore the full VLSI design flow, including system integration, circuit design, and verification, and contribute to ASIC verification under an experienced team.

The internship emphasizes strong communication, time management and organizational skills, plus knowledge of Verilog/VHDL and EDA tools.