Senior ASIC Verification Architect – Hybrid

Hewlett Packard Enterprise; Chippewa Falls (WI); Hybrid; USD 135,000 - 311,000; Full time

Benefits offered by this job

Hybrid work model

Job summary

Hewlett Packard Enterprise is seeking a Senior Design Verification Engineer to work on the Slingshot interconnect for HPC and AI systems. The role combines hands-on verification with guidance to the team, mentoring, and shaping verification methodology in a hybrid work environment (2 days per week in an office).

You will own verification scope for ASICs, collaborate with architects and logic designers, and influence verification practices while leveraging agentic AI workflows to accelerate

Qualifications

• Bachelor’s or Master’s degree in Electrical/Computer Engineering or Computer Science, or equivalent.
• 10+ years of experience in VLSI design, verification, or implementation.
• Expert level knowledge of SystemVerilog and UVM/OVM.
• Strong English communication and distributed-team experience.

Responsibilities

• Define and follow the team's design verification methodology.
• Develop SystemVerilog and UVM testbenches and bus functional models.
• Plan and implement block and integration level scoreboards and checkers.
• Write and analyze functional coverage and milestones.
• Triage regression failures and drive bug closure.
• Apply scripting, automation, and AI-assisted tools to speed up verification.

Skills

SystemVerilog

UVM/OVM

Scripting languages

English proficiency

Education

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or equivalent

Tools

EDA tools

FPGA tools

Python

Perl

Tcl

Job description

Hewlett Packard Enterprise is seeking a Senior Design Verification Engineer to work on the Slingshot interconnect for HPC and AI systems. The role combines hands-on verification with guidance to the team, mentoring, and shaping verification methodology in a hybrid work environment (2 days per week in an office).

You will own verification scope for ASICs, collaborate with architects and logic designers, and influence verification practices while leveraging agentic AI workflows to accelerate