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Hewlett Packard Enterprise is seeking an experienced ASIC Physical Design Engineer to drive design quality, timing closure, and scalable implementation across advanced processes.
You will collaborate with design, DFT, signal integrity, and architecture teams to deliver physically aware designs and improve flows. Hybrid work with about two days in-office enables collaboration and hands-on mentoring.
Hewlett Packard Enterprise is seeking an experienced ASIC Physical Design Engineer to drive design quality, timing closure, and scalable implementation across advanced processes.
You will collaborate with design, DFT, signal integrity, and architecture teams to deliver physically aware designs and improve flows. Hybrid work with about two days in-office enables collaboration and hands-on mentoring.