Destaca para este puesto — genera un currículum y una carta de presentación adaptados en cuestión de un minuto.
Hewlett Packard Enterprise (HPE) is seeking a Senior ASIC Design Engineer for our Networking Silicon team in Durham, NC. This hybrid role requires you to be in the office about 2 days per week, working on high‑speed networking chips from specification to netlist.
You’ll design modules, write detailed RTL and SVA test benches in Verilog/SystemVerilog, mentor junior engineers, and collaborate with physical design for timing closure while meeting power targets.
Hewlett Packard Enterprise (HPE) is seeking a Senior ASIC Design Engineer for our Networking Silicon team in Durham, NC. This hybrid role requires you to be in the office about 2 days per week, working on high‑speed networking chips from specification to netlist.
You’ll design modules, write detailed RTL and SVA test benches in Verilog/SystemVerilog, mentor junior engineers, and collaborate with physical design for timing closure while meeting power targets.