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Hewlett Packard Enterprise in Sunnyvale, CA is seeking a highly motivated ASIC Verification Engineer to join our networking silicon development team. The role requires working in a hybrid model with about two days per week in an HPE office.
You will own verification efforts for block or subsystem levels, develop advanced UVM environments, and collaborate across teams to deliver high-quality ASIC/SoC products. Strong SystemVerilog and UVM expertise is essential.
Hewlett Packard Enterprise in Sunnyvale, CA is seeking a highly motivated ASIC Verification Engineer to join our networking silicon development team. The role requires working in a hybrid model with about two days per week in an HPE office.
You will own verification efforts for block or subsystem levels, develop advanced UVM environments, and collaborate across teams to deliver high-quality ASIC/SoC products. Strong SystemVerilog and UVM expertise is essential.