HBM IO Design Architect for AI-Accelerated Memory

Micron Technology, Inc.; Richardson (TX); On-site; USD 150,000 - 210,000; Full time

Job summary

Micron Technology, Inc. is seeking a Senior HBM IO Design Architecture Engineer to focus on IO/TSV IO design, SI/PI analysis, and cross-functional optimization across the HBM development cycle.

The role emphasizes simulation-to-silicon correlation, AI-assisted analytics, and robust design quality processes from architecture to silicon, with a strong emphasis on communication and documentation across teams.

Qualifications

• Good IO circuit design background with familiarity of both, analog and digital design and simulation experience.
• Experience with circuit verification and optimization including layout verification and parasitic extractions of the circuits.
• Develop IO and TSV modeling methodologies to support architecture tradeoff analysis, SI/PI evaluation, and design optimization.
• Drive simulation-to-silicon correlation and post-silicon learning feedback to improve design quality across HBM product generations.
• Leverage AI Assisted analytics to accelerate root cause identification from complex multi-variable silicon data.
• Define IO architecture, TSV IO performance targets, and design quality requirements for future HBM products.
• Define and standardize IO design quality process from architecture to silicon.
• Strong documentation skills and communication to peers.

Responsibilities

• High-speed IO design architecture for HBM products.
• Define IO architecture, TSV IO performance targets, and design quality requirements for future HBM products.
• Develop IO and TSV modeling methodologies to support architecture tradeoff analysis, SI/PI evaluation, and design optimization.
• Drive simulation-to-silicon correlation and post-silicon learning feedback to improve design quality across HBM product generations.
• Leverage AI Assisted analytics to accelerate root cause identification from complex multi-variable silicon data.
• Responsible for providing cross-functional methodology development and design optimization across the HBM development cycle.

Skills

IO design

Analog & Digital design

Circuit verification

Parasitic extraction

Simulation to silicon

AI analytics

Problem solving

Documentation

Education

MS or PhD in EE

Job description

Micron Technology, Inc. is seeking a Senior HBM IO Design Architecture Engineer to focus on IO/TSV IO design, SI/PI analysis, and cross-functional optimization across the HBM development cycle.

The role emphasizes simulation-to-silicon correlation, AI-assisted analytics, and robust design quality processes from architecture to silicon, with a strong emphasis on communication and documentation across teams.