HBM IO Design Architect | SI/PI & AI-Driven Optimization

Micron Technology, Inc.; Richardson (TX); On-site; USD 130,000 - 180,000; Full time

Benefits offered by this job

Medical, Dental & Vision

Paid time off

Paid holidays

Job summary

Micron Technology, Inc. is seeking an HBM IO Design Architecture Engineer in Richardson, TX. The role focuses on HBM IO/TSV IO design, electrical modeling, SI/PI analysis, and design optimization across the HBM development cycle.

The candidate should have hands-on design execution experience, silicon correlation, and experience with high-speed interfaces including HBM, DDR, PCIe, or MIPI. MS/PhD in EE and 10+ years of experience are preferred.

Qualifications

• MS or PhD in Electrical Engineering required.
• 10+ years of relevant engineering experience in high-speed IO, PLL, Tx/Rx, equalization, clock tree.

Responsibilities

• High-speed IO architecture design for HBM products.
• Define and standardize IO design quality processes from architecture to silicon.
• Develop IO and TSV modeling methodologies for architecture tradeoffs, SI/PI evaluation, and design optimization.
• Drive simulation-to-silicon correlation and post-silicon learning feedback to improve design quality across HBM generations.
• Leverage AI-assisted analytics to accelerate root-cause identification from complex silicon data.

Skills

IO design

Analog & Digital design

Circuit verification

Parasitic extraction

SI/PI analysis

Layout verification

Problem solving

Education

MS or PhD in EE

Job description

Micron Technology, Inc. is seeking an HBM IO Design Architecture Engineer in Richardson, TX. The role focuses on HBM IO/TSV IO design, electrical modeling, SI/PI analysis, and design optimization across the HBM development cycle.

The candidate should have hands-on design execution experience, silicon correlation, and experience with high-speed interfaces including HBM, DDR, PCIe, or MIPI. MS/PhD in EE and 10+ years of experience are preferred.