HBM IO Design Architect – AI-Driven Silicon Quality

Micron Technology; Richardson (TX); On-site; USD 150,000 - 190,000; Full time

Benefits offered by this job

Medical plans

Dental plans

Vision plans

Paid time off

Paid holidays

Job summary

Micron Technology seeks an HBM IO Design Architecture Engineer to lead end-to-end design quality systems, from architecture to silicon correlation. You will drive cross‑group collaboration and standardization efforts to improve yield and performance of HBM products.

The ideal candidate has hands-on design execution experience, strong data analysis skills, and a track record of reducing design cycles through AI-driven methods.

Qualifications

• Proven experience in high‑speed IO/clocking design, 32 Gbps+
• Hands-on design execution from architecture to silicon
• Experience correlating measurements with simulations
• Familiar with off-chip protocols such as UCIe, HBM, DDR, PCIe, MIPI
• Strong problem-solving and analytical skills
• Excellent written and verbal communication

Responsibilities

• Design architecture for high-speed IO for HBM products
• Define and standardize IO design quality processes
• Correlate silicon measurements with simulations for circuit analysis
• Support cross-group communication for standardization
• Apply AI-assisted analytics to identify root causes from silicon data

Skills

High-speed IO design

Clocking design

Analog and digital design

Circuit verification

AI-driven analytics

Documentation

Education

MS or PhD in EE

Tools

Circuit verification tools

Job description

Micron Technology seeks an HBM IO Design Architecture Engineer to lead end-to-end design quality systems, from architecture to silicon correlation. You will drive cross‑group collaboration and standardization efforts to improve yield and performance of HBM products.

The ideal candidate has hands-on design execution experience, strong data analysis skills, and a track record of reducing design cycles through AI-driven methods.