FPGA Design Engineer - Secret Clearance, On-Site

Northrop Grumman; Rolling Meadows (IL); On-site; USD 96,000 - 145,000; Full time

Benefits offered by this job

Relocation assistance may be available

Health insurance

Paid time off

Job summary

Northrop Grumman is seeking an FPGA Design Engineer to join the Rolling Meadows, IL team. You will contribute across the FPGA development lifecycle, delivering RF/EO-IR subassemblies and coordinating with cross-functional engineering groups.

The role requires a strong background in HDL, FPGA toolchains, and a willingness to obtain and maintain a secret security clearance. On-site work in Rolling Meadows is expected.

Qualifications

• Bachelor’s degree in Electrical/Computer Engineering or related field, 2+ years FPGA/ASIC design.
• Solid understanding of VHDL, Verilog, or SystemVerilog.
• Experience with synchronous RTL, including state machines, control logic, data paths, clocks, and resets.
• Experience developing RTL testbenches and debugging simulation failures.
• Familiarity with the overall FPGA development flow, including RTL simulation, synthesis, place and route, timing analysis, and generation of FPGA programming files.
• Experience with FPGA device architectures and toolchains (Xilinx Vivado or Intel Quartus).
• Experience with FPGA EDA tools (ModelSim/QuestaSim, Synplify, Vivado, Quartus, Platform Designer).
• Experience with scripting or programming languages (MATLAB, Python, or C/C++).
• Exposure to engineering requirements, design specs, test specs, or technical docs.
• Ability to complete defined technical assignments with guidance and communicate status.

Responsibilities

• Contribute across the FPGA development lifecycle from requirements to timing closure.
• Develop FPGA-based digital subsystems for circuit card assemblies.
• Collaborate with systems, software, hardware, and integration engineers.
• Work with FPGA technologies from AMD Xilinx, Intel, and high-speed interfaces.
• Support hardware integration and troubleshooting.

Skills

VHDL/Verilog/SystemVerilog

RTL design

Synchronous RTL

RTL testbenches

FPGA toolchain Vivado/Quartus

ModelSim/QuestaSim

MATLAB/Python/C/C++

U.S. citizenship

Interim secret clearance

Communication skills

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, or closely related engineering discipline

Tools

Vivado

Quartus

ModelSim/QuestaSim

Job description

Northrop Grumman is seeking an FPGA Design Engineer to join the Rolling Meadows, IL team. You will contribute across the FPGA development lifecycle, delivering RF/EO-IR subassemblies and coordinating with cross-functional engineering groups.

The role requires a strong background in HDL, FPGA toolchains, and a willingness to obtain and maintain a secret security clearance. On-site work in Rolling Meadows is expected.