FPGA Design Engineer – Secret Clearance Eligible

Northrop Grumman; Palatine Township (IL); In loco; USD 96.000 - 145.000; Tempo pieno

Vantaggi offerti da questo lavoro

Relocation assistance

Descrizione del lavoro

Northrop Grumman in Rolling Meadows, IL is seeking an FPGA Design Engineer to advance end-to-end development of RF and EO/IR products. You will contribute across RTL design, verification, timing closure, hardware integration and production support within MSTS.

Candidate will have a BS in Electrical/Computer Engineering with 2+ years FPGA/ASIC experience, VHDL/Verilog/SystemVerilog, and experience with Vivado/Quartus, ModelSim, scripting, and high-speed interfaces. U.S.

Competenze

• Bachelor’s degree in Electrical or Computer Engineering with 2+ years FPGA/ASIC design experience.
• Solid understanding of VHDL, Verilog or SystemVerilog for RTL design.
• Experience with RTL testbenches and debugging.
• Familiar with FPGA toolchains (Vivado/Quartus) and timing analysis.

Mansioni

• Contribute across RTL design, verification, timing, and integration.
• Develop FPGA-based subsystems and interfaces.
• Collaborate with systems, software, and HW teams.
• Support qualification, production, and field troubleshooting.

Conoscenze

RTL design with Verilog/SystemVerilog

VHDL familiarity

Scripting: Python/MATLAB

High-speed interfaces (PCIe, Ethernet)

DFX / testbench development

Formazione

B.S. in Electrical/Computer Engineering

Strumenti

Vivado

Quartus

ModelSim/QuestaSim

Platform Designer/Qsys

Descrizione del lavoro

Northrop Grumman in Rolling Meadows, IL is seeking an FPGA Design Engineer to advance end-to-end development of RF and EO/IR products. You will contribute across RTL design, verification, timing closure, hardware integration and production support within MSTS.

Candidate will have a BS in Electrical/Computer Engineering with 2+ years FPGA/ASIC experience, VHDL/Verilog/SystemVerilog, and experience with Vivado/Quartus, ModelSim, scripting, and high-speed interfaces. U.S.