Senior FPGA Design Engineer – Secret Clearance

Northrop Grumman; Chandler (AZ); On-site; USD 108,000 - 162,000; Full time

Benefits offered by this job

Relocation assistance

Job summary

Northrop Grumman Space Systems in Chandler, AZ is seeking a Staff FPGA Digital Engineer to support the EO Group in Launch Vehicles. You will apply advanced FPGA engineering to cross-disciplinary teams and lead design and verification efforts for high-reliability space systems.

The role requires strong VHDL/Verilog skills, experience with AMD Xilinx FPGAs, and a DoD Secret clearance. Relocation assistance is available and the position is on-site in Chandler, AZ.

Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or related discipline and 12 years of relevant experience, or advanced degrees with fewer years.
• Ability to obtain a U.S. DoD Secret clearance at time of application.
• Advanced FPGA/SoC background with firmware in VHDL/Verilog.

Responsibilities

• Lead resolution of design and integration challenges across hardware, software, and algorithms.
• Develop high-level test benches to verify FPGA designs for timing and functionality.
• Create and integrate HDL modules and verify with device architecture.
• Maintain design documentation and verify results.
• Stay current with FPGA tools and industry methodologies.
• Mentor junior engineers and ensure design standard compliance.

Skills

FPGA/SoC design

VHDL/Verilog

OSVVM/UVM

Questa/ModelSim

Vivado/Vitis IDE

DDR memory interfaces

Ethernet/PCIe/AXI4/UART/SDLC

Embedded C/C++

HDL verification

Education

Bachelor’s degree in Electrical Engineering or Computer Engineering

MS/PhD preferred

Tools

Questa/ModelSim

Vivado IDE

Vitis Unified IDE

Oscilloscopes/Logic Analyzers

Job description

Northrop Grumman Space Systems in Chandler, AZ is seeking a Staff FPGA Digital Engineer to support the EO Group in Launch Vehicles. You will apply advanced FPGA engineering to cross-disciplinary teams and lead design and verification efforts for high-reliability space systems.

The role requires strong VHDL/Verilog skills, experience with AMD Xilinx FPGAs, and a DoD Secret clearance. Relocation assistance is available and the position is on-site in Chandler, AZ.