FPGA Design Engineer (Early-Career) — Secret Clearance

Northrop Grumman; Chandler (AZ); On-site; USD 87,000 - 131,000; Full time

Benefits offered by this job

Relocation assistance

Discretionary bonus

Health insurance

Life and disability insurance

Savings plan

Company paid holidays

Paid time off (PTO)

Job summary

Northrop Grumman Space Systems in Chandler, AZ seeks an FPGA Digital Engineer to support the EO Group. You will collaborate with hardware, algorithms, and software teams to design, verify, and integrate FPGAs for advanced systems, under guidance in an early-career role.

The role emphasizes learning foundational skills, developing test benches, and producing documentation, with opportunities to contribute to device architecture, IO and image processing HDL modules, and compliance with design

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering with 2+ years of experience; or a Master’s degree.
• Ability to obtain a DoD Secret clearance at time of application.
• Internship, co-op, or academic projects with FPGAs/SoCs (VHDL/Verilog).
• Exposure to AMD Xilinx FPGAs and SoCs (academic or project).
• Familiarity with timing, power, I/O design and Vivado IDE.
• Experience with digital interfaces/buses and verification tools (Ethernet, PCIe, AXI4, UART).
• Knowledge of simulation tools (Questa/ModelSim) or hardware debugging tools.

Responsibilities

• Assist senior FPGA engineers and multidisciplinary teams to resolve design challenges.
• Develop and execute test benches to verify FPGA designs against timing requirements.
• Support IO and image processing HDL modules; document module definitions and tests.
• Maintain design documentation and test results with oversight.
• Help manage FPGA bitstream builds and configuration management.
• Ensure compliance with internal design standards throughout development.

Skills

FPGA design & verification

VHDL/Verilog

HDL test benches

Vivado IDE

Digital hardware concepts

Embedded C/C++ (bonus)

Education

Bachelor’s degree in Electrical or Computer Engineering

Master’s degree (preferred)

Tools

Vivado IDE

Questa/ModelSim

Oscilloscopes & logic analyzers

Memory interfaces (DDR3/4/5)

AMD Xilinx FPGAs/SoCs

Job description

Northrop Grumman Space Systems in Chandler, AZ seeks an FPGA Digital Engineer to support the EO Group. You will collaborate with hardware, algorithms, and software teams to design, verify, and integrate FPGAs for advanced systems, under guidance in an early-career role.

The role emphasizes learning foundational skills, developing test benches, and producing documentation, with opportunities to contribute to device architecture, IO and image processing HDL modules, and compliance with design