Director, Power Package Design & SiP Engineering

Renesas Electronics; Phoenix (AZ); On-site; USD 150,000 - 210,000; Full time

Job summary

Renesas Electronics is seeking a senior packaging technology professional in the United States to lead the development of power SiP/module packaging and wafer-level technologies. You will drive design, qualification, and production ramp with OSAT/CM partners, ensuring quality and timely delivery for automotive, industrial, and data center markets.

The role requires a PhD/masters/bachelor in engineering or physical sciences and 15–20 years of experience in packaging, with strong analytical and

Qualifications

• PhD/Masters/Bachelor’s Degree in Physics, Chemistry, Mechanical, Electrical or Materials Engineering.
• 15 to 20 years of relevant experience in package development emphasizing power SiP/module, wafer level & flip-chip packaging
• Strong understanding of power SiP/modules, wafer level/flip-chip packaging methods, assembly process knowledge, qualification methods, SPC and statistical analysis software
• Knowledge of wire-bonding & multi-chip module technologies a plus.
• Strong interpersonal and communication skills.
• Strong analytical and presentation skills.

Responsibilities

• Lead package technology development, NPI, and OSAT management.
• Develop and define packaging methods for AI/Datacenter power packaging needs including Smart Power Stages and Power Modules.
• Benchmark, select and qualify materials, processes and OSAT/CM partners.
• Collaborate with OSAT/CM to run DOE and optimize processes and establish specs.
• Work with Product groups and Reliability to qualify new packages and processes.
• Resolve production-window issues and ensure robust production controls.
• Develop and maintain expertise on advances in power SiP/modules and flip-chip interconnects.
• Participate in packaging roadmap development and execution.
• Address internal and external customer complaints with cross-functional teams.
• Establish and maintain packaging design rules.

Skills

Power SiP/Module

Wafer-level packaging

Flip-chip packaging

Wire-bonding

Statistical analysis (SPC)

Education

PhD/Masters/Bachelor in Engineering/Physics/Chemistry

Job description

Renesas Electronics is seeking a senior packaging technology professional in the United States to lead the development of power SiP/module packaging and wafer-level technologies. You will drive design, qualification, and production ramp with OSAT/CM partners, ensuring quality and timely delivery for automotive, industrial, and data center markets.

The role requires a PhD/masters/bachelor in engineering or physical sciences and 15–20 years of experience in packaging, with strong analytical and