Senior AI-Driven Verification Engineer for Chip Tapeouts

Voltai; Palo Alto (CA); On-site; USD 150,000 - 210,000; Full time

Job summary

Voltai in California is seeking a Senior Verification Engineer to redefine how chips are verified. You will own verification strategy across IP blocks, build AI-assisted workflows, and develop reusable verification frameworks.

Collaborate with ML and software teams, interact with customers, and drive qualification and tapeout readiness with strong quality metrics. Mentoring and shaping best practices are core to the role in a fast-moving hardware AI environment.

Qualifications

• 4-6 years of hands-on verification experience.
• Strong SystemVerilog and UVM skills with proven debug depth.
• Familiarity with Python or similar scripting languages.
• Curious mindset toward AI or automation in verification.
• Ability to work across domains and communicate clearly with software or ML teams.

Responsibilities

• Own verification strategy across multiple IP blocks and subsystems, from testbench architecture to signoff.
• Design and develop AI assisted workflows that accelerate verification, coverage closure, and debug.
• Build reusable verification frameworks using SystemVerilog, UVM, Python and custom automation tooling.
• Collaborate with ML and software teams to integrate AI models into existing DV environments.
• Contribute to product direction by exploring how automation can reshape verification methodologies.
• Work with customers in a forward deployed capacity when needed, translating real design challenges into product features.
• Drive tapeout readiness with full accountability for quality metrics, regression health, and coverage targets.
• Mentor junior engineers and help define best practices for next generation verification teams.

Skills

SystemVerilog

UVM

Python

AI/Automation mindset

Cross-domain communication

Tools

SystemVerilog

UVM

Python

Job description

Voltai in California is seeking a Senior Verification Engineer to redefine how chips are verified. You will own verification strategy across IP blocks, build AI-assisted workflows, and develop reusable verification frameworks.

Collaborate with ML and software teams, interact with customers, and drive qualification and tapeout readiness with strong quality metrics. Mentoring and shaping best practices are core to the role in a fast-moving hardware AI environment.