DFT Architect: Lead Silicon Test & MBIST Strategy

Advanced Micro Devices; San Jose (CA); Hybrid; USD 180,000 - 260,000; Full time

Benefits offered by this job

AMD Benefits at a glance

Equal opportunity employer

Job summary

Advanced Micro Devices (AMD) is seeking a senior DFT Architect in San Jose, CA to define and shepherd DFT architectures for Scan, MBIST, PHY and high-speed IOs. You will work with design, DFX, and physical teams to deliver manufacturable solutions, support early silicon validation, and enable high-volume production.

You will lead cross-functional teams, leverage expertise in DFT tooling and pre/post-silicon activities, and mentor engineers across continents.

Qualifications

• MS or Ph.D. in Electrical/Electronic/Computer Engineering.
• Significant DFT engineering experience through pre and post silicon cycles.
• Experience with Scan, MBIST, and high-speed IO DFT architectures.
• Ability to communicate complex engineering topics to cross-functional teams.

Responsibilities

• Promote ATE and production test environment, test cost and test quality enhancements in future AMD products through DFT architecture definitions and specifications.
• Manage DFT activities across architecture, design implementation, verification, and test implementation for new products.
• Drive best manufacturing test solutions through early product definition and pre/post silicon activities within the global quality and operations organization.
• Collaborate with design teams to ensure DFT structures are correctly implemented.
• Lead internal DFT teams to implement and create test solutions.
• Drive firmware-driven test solutions and plan for diagnosability and yield improvement.

Skills

DFT engineering

MBIST

Verilog

FPGA logic

Synthesis

STA

communication skills

Education

MS or PhD in Electrical/Electronic/Computer Engineering

Tools

Tessent SSN

ATPG tools

Job description

Advanced Micro Devices (AMD) is seeking a senior DFT Architect in San Jose, CA to define and shepherd DFT architectures for Scan, MBIST, PHY and high-speed IOs. You will work with design, DFX, and physical teams to deliver manufacturable solutions, support early silicon validation, and enable high-volume production.

You will lead cross-functional teams, leverage expertise in DFT tooling and pre/post-silicon activities, and mentor engineers across continents.