DFX DV Engineer - SoC Scan, ATPG & DFT Expert

Advanced Micro Devices; United States; On-site; USD 120,000 - 180,000; Full time

Job summary

Advanced Micro Devices (AMD) is seeking a motivated Silicon Design Engineer to own and advance DFX features for complex SOCs. You will collaborate with RTL, verification, and PD teams to drive DFT implementations in Scan/ATPG and related architectures.

You will develop automated design flows, apply debugging methods, and leverage Tessent, Fusion Compiler, and other industry tools to deliver robust DFX solutions across AMD’s silicon platforms.

Qualifications

• Experience with ASIC DFX and scan synthesis preferred.
• Proficiency with DFX flow tools (Tessent, IJTAG, SSN) and RTL quality checks.
• Strong debugging skills and scripting ability (Perl/Python/TCL).

Responsibilities

• Own/lead the DFX Design Architect and develop DFX features (SCAN, ATPG, MBIST, BSCAN).
• Collaborate with RTL, Verification, and PD teams to enable DFT in Scan/ATPG.
• Design and deploy automated flows for DFT in complex SOC ASICs.
• Support debugging and validation across DFX architectures and flows.

Skills

DFX engineering

Scan/ATPG

ASIC DFX

Scripting

Education

Bachelors or Masters in Computer/Electrical Engineering

Tools

Tessent

Fusion Compiler

Design Compiler

Spyglass

IJTAG

SSN

TestKompress

EDT

Job description

Advanced Micro Devices (AMD) is seeking a motivated Silicon Design Engineer to own and advance DFX features for complex SOCs. You will collaborate with RTL, verification, and PD teams to drive DFT implementations in Scan/ATPG and related architectures.

You will develop automated design flows, apply debugging methods, and leverage Tessent, Fusion Compiler, and other industry tools to deliver robust DFX solutions across AMD’s silicon platforms.