DFT Architect

Advanced Micro Devices; San Jose (CA); Hybrid; USD 180,000 - 260,000; Full time

Benefits offered by this job

AMD Benefits at a glance

Equal opportunity employer

Job summary

Advanced Micro Devices (AMD) is seeking a senior DFT Architect in San Jose, CA to define and shepherd DFT architectures for Scan, MBIST, PHY and high-speed IOs. You will work with design, DFX, and physical teams to deliver manufacturable solutions, support early silicon validation, and enable high-volume production.

You will lead cross-functional teams, leverage expertise in DFT tooling and pre/post-silicon activities, and mentor engineers across continents.

Qualifications

• MS or Ph.D. in Electrical/Electronic/Computer Engineering.
• Significant DFT engineering experience through pre and post silicon cycles.
• Experience with Scan, MBIST, and high-speed IO DFT architectures.
• Ability to communicate complex engineering topics to cross-functional teams.

Responsibilities

• Promote ATE and production test environment, test cost and test quality enhancements in future AMD products through DFT architecture definitions and specifications.
• Manage DFT activities across architecture, design implementation, verification, and test implementation for new products.
• Drive best manufacturing test solutions through early product definition and pre/post silicon activities within the global quality and operations organization.
• Collaborate with design teams to ensure DFT structures are correctly implemented.
• Lead internal DFT teams to implement and create test solutions.
• Drive firmware-driven test solutions and plan for diagnosability and yield improvement.

Skills

DFT engineering

MBIST

Verilog

FPGA logic

Synthesis

STA

communication skills

Education

MS or PhD in Electrical/Electronic/Computer Engineering

Tools

Tessent SSN

ATPG tools

Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD.

At AMD, we believetechnology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMDis shapingthefuture.

Whetheryou’redesigning next-gen processors, enabling AI breakthroughs, orbringing leading edge products to market, every role at AMD contributes to something bigger— technologythat moves the world forward.Join us and, together, we’ll advance your career.

THE ROLE:

As a DFT Architect you will drive DFT architecture definitions of Scan, MBIST, PHY, high-speed/high-density IOs, communication controllers and FPGA logics of future AMD products. The role involves working with design architecture, design DFT/DFX, design block owners and physical design teams with ATE manufacturing environment, silicon debug, product quality and test cost perspectives. The DFT architect is expected to apply past technical knowledge, learn new cutting-edge technologies and collaborate with teams to arrive at best manufacturable solution. The DFT architect will ensure that DFT implementation is completed by architecture design specifications. This is the role of overseeing early architecture design definition to successful silicon high-volume production.

THE PERSON:

We are looking for candidates that can communicate complex engineering subjects effectively to cross functioning technical teams and upper management. Strong DFT and leadership skills will be put to good use. Successful DFT architects interact with many external teams and must confidently represent his/her organization.

KEY RESPONSIBILITIES:

• Promote ATE & production test environment, test cost and test quality enhancements in future AMD products through DFT architecture definitions and specifications
• Manage DFT activities across architecture, design implementation, verification, and test implementation for new products.
• The role is in AMD global quality and operation organization driving best manufacturing test solution through early product definition and pre & post silicon activities
• Work closely with design teams and make sure DFT structures are correctly implemented.
• Drive internal DFT teams to correctly implement and create test solutions
• Drive firmware driven test solutions
• Plan for diagnosability and yield improvement

PREFERRED EXPERIENCE:

• Significant DFT engineering experience through DFT pre and post silicon cycles
• Experience in creating and implementing complex chip-level DFT architecture
• Experience in DFT implementation including Scan and Scan Compression at IP and SoC level
• Experience with DFT tools, ATPG (Stuck-At, At-Speed, Path-Delay) and scan compression.
• Strong MBIST knowledge
• Experience in PHY, high-speed IO, digital communication and functional test development
• Knowledge of Tessent Streaming Scan Network SSN and hand-on experience is a big plus
• Good understanding of Verilog, synthesis, physical implementation and STA
• Good understanding of verification methodology
• Knowledge of FPGA logic, synthesis and design flow is a plus
• Knowledge of embedded design and firmware methodology is a plus
• Experience with post-silicon debug and bench equipment (e.g., oscilloscope and logic analyser)
• Good communication skills and works well in a group environment that spans across continents

ACADEMIC CREDENTIALS:

• MS or Ph.D. in Electrical/Electronic/Computer Engineering

LOCATION:

San Jose, California, United States

This role is not eligible for visa sponsorship.

Benefits offered are described: AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.

This posting is for an existing vacancy.