Design Verification Engineer

iFlow Inc.; Santa Clara (CA); On-site; USD 120,000 - 150,000; Full time

Job summary

iFlow Inc. is seeking a Design Verification Engineer based in Santa Clara, CA, for a long-term position. The successful candidate will possess 8-15 years of experience, showcasing a strong proficiency in SystemVerilog and UVM, alongside debugging skills.

Key responsibilities include developing verification environments for testing, performing coverage analysis, and collaborating with RTL designers to debug simulation failures while ensuring design quality across various domains.

Qualifications

• 8-15 years of experience in design verification.
• Strong understanding of design specifications.
• Ability to develop test plans based on requirements.

Responsibilities

• Develop verification environments for IP, subsystem, and SoC level testing.
• Perform coverage analysis and close functional/code coverage.
• Debug simulation failures in collaboration with RTL designers.

Skills

SystemVerilog

UVM

Debugging skills

Understanding of AMBA protocols

Job description

Design Verification Engineer

Location: Santa Clara, CA

Duration: Long term

Experience: 8-15 Years

Key Responsibilities

• Strong understanding of SystemVerilog (SV) and UVM and good debugging skills.
• Understanding of AMBA protocols.
• Understand design specs and develop test plans based on functional and architectural requirements.
• Build UVM/SystemVerilog-based verification environments for IP, subsystem, and SoC level testing.
• Develop directed and random test cases, perform coverage analysis, and close functional/code coverage.
• Debug simulation failures and work closely with RTL designers to resolve issues.
• Execute regression runs, analyze results, and contribute to continuous improvements.
• Integrate and run power‑aware simulations, low‑power checks, and work with UPF/CPF as needed.
• Collaborate with DFT/PD/RTL teams and post‑silicon validation to ensure design quality across domains.
• Document test environments, test plans, and results for internal and external reviews.