ASIC/SoC Design Engineer – NoC, RTL, Coherence Expert

Apple, Inc.; Austin (TX); On-site; USD 150,000 - 278,000; Full time

Benefits offered by this job

Medical and dental coverage

Employee stock programs

Stock Purchase Plan

Relocation assistance

Job summary

Apple Inc. is seeking a skilled RTL Design Engineer in Austin, TX to design and integrate coherent and non-coherent fabrics within an SoC. You will own RTL development, templating, and generation, collaborating with multiple teams to ensure on-time delivery of high-quality blocks.

The role emphasizes interconnect architectures, memory hierarchy and collaboration with synthesis, power/performance, and verification teams to meet strict schedules.

Qualifications

• BS + 3 years relevant industry experience.
• Strong RTL design and verification experience.
• Familiar with front-end tools including lint, CDC and synthesis.
• Collaborative, organized and able to work with cross-functional teams.

Responsibilities

• Design & integration of coherent and non-coherent fabrics into a subsystem or SoC with on-chip interconnect architectures.
• Own all aspects of RTL development, templating, scripting and RTL generation.
• Collaborate with other designers to deliver results on schedule.
• Integrate IP blocks to design and optimize memories/hard macros.
• Coordinate with front-end synthesis/STA teams to meet timing.

Skills

RTL design

Memory hierarchy

Coherence protocols

Synthesis

Interconnect fabrics

Education

BS in Electrical Engineering or related field

Tools

Lint

CDC

Synthesis tools

Job description

Apple Inc. is seeking a skilled RTL Design Engineer in Austin, TX to design and integrate coherent and non-coherent fabrics within an SoC. You will own RTL development, templating, and generation, collaborating with multiple teams to ensure on-time delivery of high-quality blocks.

The role emphasizes interconnect architectures, memory hierarchy and collaboration with synthesis, power/performance, and verification teams to meet strict schedules.