ASIC Physical Design Lead — Automation & AI Tools

OHO Group (Lithuania); San Francisco (CA); Sur place; USD 180 000 - 260 000; Plein temps

Résumé du poste

OHO Group seeks a Physical Design Lead to own ASIC implementation from RTL to GDS. You will drive synthesis, floorplanning, placement, CTS, routing and timing closure, pushing PPA gains while preserving signoff quality.

Lead automation with Python/Tcl and apply AI-assisted tooling to streamline workflows, combining hands-on design ownership with leadership in a fast-evolving AI-infused semiconductor space.

Qualifications

• 5+ years of ASIC physical-design experience.
• Hands-on ownership of designs through tapeout.
• Broad implementation and signoff expertise with PPA trade-offs.
• Strong scripting skills and experience improving EDA flows.
• Practical experience using AI tools in engineering with validation.

Responsabilités

• Lead ASIC implementation from RTL through to GDS.
• Own synthesis, floorplanning, placement, clock-tree synthesis, routing and timing closure.
• Drive power, performance and area improvements while maintaining signoff quality.
• Resolve timing, physical verification and power-integrity issues.
• Build Python and Tcl automation and apply AI-assisted tooling to implementation workflows.

Connaissances

ASIC design

Scripting

AI in engineering

EDA flows

Tapeout ownership

Outils

Python

Tcl

EDA tools

Description du poste

OHO Group seeks a Physical Design Lead to own ASIC implementation from RTL to GDS. You will drive synthesis, floorplanning, placement, CTS, routing and timing closure, pushing PPA gains while preserving signoff quality.

Lead automation with Python/Tcl and apply AI-assisted tooling to streamline workflows, combining hands-on design ownership with leadership in a fast-evolving AI-infused semiconductor space.