ASIC Engineer for Cloud-Scale ML Acceleration

Amazon; Cupertino (CA); On-site; USD 157,000 - 213,000; Full time

Job summary

Amazon in Cupertino, CA is seeking an ASIC Design Engineer for Cloud-Scale Machine Learning Acceleration. The role focuses on design and optimization of high‑performance RTL, SystemVerilog, and timing‑clean designs for AWS data center accelerators.

The position requires a BA/BE in Electrical Engineering or related field, strong debugging and verification experience, and collaboration with cross-functional teams across pre/post-silicon stages. Relocation and hybrid options may apply.

Qualifications

• Bachelor's degree in Electrical Engineering or a related field.
• Experience identifying bugs in architecture, algorithms, functionality, and performance with strong debugging skills.
• Experience verifying at multiple levels of logic from IP blocks to SoCs to full system testing.
• Master's degree in Electrical or Communications Engineering or a related field.
• Experience with formal verification techniques including abstraction and end-to-end checking.
• Experience with ARM and various DSP ISAs.
• Experience with RF standards in cellular (4G/5G NR), WiMAX, 802.11ad, microwave backhaul, or related broadband wireless standards.
• Experience with Python or Perl for automation.

Responsibilities

• Develop and implement high-performance, area and power-efficient RTL designs to meet project specifications and targets.
• Conduct in-depth analysis of designs, microarchitectures, and architectures to optimize trade-offs between features, power consumption, performance, and area requirements.
• Create microarchitectures, implement SystemVerilog RTL, and deliver synthesis and timing-clean designs with appropriate constraints.
• Execute lint and clock domain crossing quality checks to ensure design integrity.
• Collaborate closely with cross-functional teams, including architects, fellow designers, verification specialists, pre- and post-silicon validation teams, and synthesis, timing, and back-end experts.

Skills

Bug identification

Debugging

SystemVerilog understanding

RTL design

Hardware debugging

Education

Bachelor's degree in Electrical Engineering or related field

Master's degree in Electrical/Communications Engineering or related field

Tools

SystemVerilog

Python

Perl

Job description

Amazon in Cupertino, CA is seeking an ASIC Design Engineer for Cloud-Scale Machine Learning Acceleration. The role focuses on design and optimization of high‑performance RTL, SystemVerilog, and timing‑clean designs for AWS data center accelerators.

The position requires a BA/BE in Electrical Engineering or related field, strong debugging and verification experience, and collaboration with cross-functional teams across pre/post-silicon stages. Relocation and hybrid options may apply.