Senior ASIC Design Engineer for High-Performance ML SoCs

Amazon Web Services (AWS); Austin (TX); On-site; USD 136,000 - 184,000; Full time

Job summary

Amazon Web Services (AWS) in Austin, TX is seeking an ASIC Design Engineer to design high-performance, power-efficient RTL for datacenter ML accelerators, including AWS Inferentia. The role focuses on SystemVerilog RTL, microarchitectures, and cross-functional collaboration across silicon teams.

The ideal candidate has a strong ASIC design background, proficiency in SystemVerilog, and excellent problem-solving skills; experience with high-performance designs is highly desirable.

Qualifications

• Bachelor’s degree or equivalent required.
• 3+ years of non‑internship design or architecture experience.
• Master’s degree in CS or equivalent preferred.
• Experience with high-performance and power-efficient designs desirable.

Responsibilities

• Develop and implement high-performance, area and power-efficient RTL designs to meet project specifications and targets.
• Conduct in-depth analysis of designs, microarchitectures, and architectures to optimize trade-offs between features, power, performance and area.
• Create microarchitectures, implement SystemVerilog RTL, and deliver synthesis and timing-clean designs with appropriate constraints.
• Execute lint and clock domain crossing quality checks to ensure design integrity.
• Collaborate closely with cross-functional teams including architects, designers, verification, pre-/post-silicon validation, and back-end experts.

Skills

SystemVerilog

RTL design

Education

Bachelor's degree or equivalent

Master's degree in CS or equivalent

Tools

SystemVerilog

Job description

Amazon Web Services (AWS) in Austin, TX is seeking an ASIC Design Engineer to design high-performance, power-efficient RTL for datacenter ML accelerators, including AWS Inferentia. The role focuses on SystemVerilog RTL, microarchitectures, and cross-functional collaboration across silicon teams.

The ideal candidate has a strong ASIC design background, proficiency in SystemVerilog, and excellent problem-solving skills; experience with high-performance designs is highly desirable.