Advanced Packaging Research Engineer — Chiplets & 2.5D/3DIC (Hybrid)

Intel Corporation; Chandler (AZ); Hybrid; USD 122,000 - 232,000; Full time

Benefits offered by this job

Stock bonuses

Health benefits

Vacation

Job summary

Intel Corporation in Phoenix, AZ, is seeking a College Grad for a Semiconductor Packaging Research Engineer role focused on advanced packaging and heterogeneous integration. You will explore architectures like chiplets, 2.5D/3DIC, and hybrid bonding, guiding feasibility, reliability, and manufacturability through experiments and modeling.

Collaborate across research, design, materials, reliability, and manufacturing teams to translate product needs into research plans, hypotheses, and actionable

Qualifications

• Master’s or Ph.D. in Mechanical Engineering, Electrical Engineering, Materials Science, Applied Physics, Computational Mechanics, Microelectronics, Semiconductor Manufacturing, or related field.
• 1+ years’ experience in semiconductor packaging research, advanced packaging integration, process integration, modeling/simulation, reliability, materials, or heterogeneous integration.
• 1+ years’ experiencewithadvanced packaging technologies such as flip chip, chiplets, 2.5D/3DIC, fan-out, hybrid bonding, interposers, HBM integration, advanced substrates, or die-to-die interconnects.

Responsibilities

• Research advanced packaging concepts such as chiplets, heterogeneous integration, 2.5D/3DIC, hybrid bonding, interposer, and die-to-die interconnects.
• Drive either process integration learning or modeling/simulation to assess feasibility, reliability, manufacturability, and technology readiness.
• For process integration: define integration flows, research vehicles, DOE, defect/yield learning, qualification evidence, and risk mitigation paths.
• For modeling: develop and validate thermal, thermo-mechanical, electrical, reliability, or multi-physics models using experimental and failure analysis data.
• Translate product needs into research hypotheses, technical plans, and recommendations; document outputs through reports, design guidance, IP, publications, and development-transfer inputs.
• Collaborate across research, design, process, materials, reliability, manufacturing, supplier, university, and ecosystem teams.

Skills

Packaging research

DOE planning

Modeling/simulation

Cross-functional collaboration

Education

Master’s or Ph.D. in Mechanical Engineering, Electrical Engineering, Materials Science, Applied Physics, Computational Mechanics, Microelectronics, Semiconductor Manufacturing, or related field

Tools

ANSYS

Abaqus

COMSOL

HFSS

MATLAB

Python

Job description

Intel Corporation in Phoenix, AZ, is seeking a College Grad for a Semiconductor Packaging Research Engineer role focused on advanced packaging and heterogeneous integration. You will explore architectures like chiplets, 2.5D/3DIC, and hybrid bonding, guiding feasibility, reliability, and manufacturability through experiments and modeling.

Collaborate across research, design, materials, reliability, and manufacturing teams to translate product needs into research plans, hypotheses, and actionable