Senior MEMS Packaging Engineer - WLCSP & Bumping Expert

SiTime Corp.; Singapore; On-site; SGD 70,000 - 110,000; Full time

Benefits offered by this job

Equity grants

Quarterly bonus

Equal opportunity employer

Job summary

SiTime in Singapore is seeking a Packaging Process Engineer to develop, optimize, and sustain advanced packaging processes for WLCSP, with emphasis on bumping, RDL, underfill, and dicing. You will work with R&D, design, equipment, and manufacturing teams to ensure smooth transfer to high‑volume production.

The role requires hands‑on expertise in process development, Cp/Cpk, and SPC, with a strong focus on quality and GMP adherence in a fast‑paced semiconductor environment.

Qualifications

• Develop, optimize, and characterize packaging processes for WLCSP technologies.
• Perform root cause analysis and implement corrective actions.
• Collaborate with R&D, design, equipment, and manufacturing teams.
• Lead or participate in NPI and process improvement projects.
• Evaluate and qualify new materials, equipment, and processes.
• Stay updated with industry trends in packaging technologies.

Responsibilities

• Develop, optimize, and characterize packaging processes for WLCSP technologies, including bumping, re‑distribution layer (RDL) formation, underfill, dicing.
• Perform root cause analysis and implement corrective and preventive actions (8D methodology) for process‑related issues and defects.
• Collaborate with R&D, design, equipment, and manufacturing teams to ensure seamless process transfer from development to high‑volume manufacturing.
• Lead or participate in cross‑functional teams for new product introduction (NPI) and process improvement projects.
• Evaluate and qualify new materials, equipment, and processes to support technology roadmaps and production requirements.
• Stay updated with the latest industry trends and advancements in packaging technologies.
• Conduct process capability analysis (Cp/Cpk), implement statistical process control (SPC), and drive continuous improvement initiatives to enhance yield, quality, and cost‑efficiency.
• Define and maintain process specifications, control plans, and standard operating procedures (SOPs).
• Provide technical support and training for manufacturing operators and technicians.

Skills

Process optimization

Cross-functional collaboration

Quality & GMP adherence

Root cause analysis

Detail-oriented

Strong communication

Job description

SiTime in Singapore is seeking a Packaging Process Engineer to develop, optimize, and sustain advanced packaging processes for WLCSP, with emphasis on bumping, RDL, underfill, and dicing. You will work with R&D, design, equipment, and manufacturing teams to ensure smooth transfer to high‑volume production.

The role requires hands‑on expertise in process development, Cp/Cpk, and SPC, with a strong focus on quality and GMP adherence in a fast‑paced semiconductor environment.