Principal AI-Driven Semiconductor Packaging Engineer

MICRON SEMICONDUCTOR ASIA OPERATIONS PTE LTD; Singapore; On-site; SGD 120,000 - 190,000; Full time

Job summary

Micron Semiconductor Asia Operations Pte Ltd in Singapore seeks a Process Development professional to advance post-fab wafer finishing and AI-enabled manufacturing. You will partner with Package Integration, Front End Wafer Fab, and Quality teams to drive performance, cost, reliability, and schedule targets for next‑gen memory technologies.

You will establish wafer-level processes, evaluate new equipment, analyze data, and deliver robust POR/MOR documentation for production transfer.

Qualifications

• PhD with ≥2 years, or Master’s with ≥5 years, or Bachelor’s with ≥7 years of relevant experience.
• Semiconductor process development experience, wafer bonding, plating, warpage control and packaging.

Responsibilities

• Establish and improve wafer-level process conditions and technologies.
• Upgrade process capabilities and reduce production costs.
• Establish and improve process management projects for technology node scaling.
• Evaluate and promote new equipment and materials to enhance process capabilities.
• Ensure defense coverage through process, measurement, inspection, and testing.
• Collaborate with cross-functional teams to deploy technology developments.
• Provide POR and MOR documentation for product transfer to high-volume facilities.

Skills

Strong analytical skills

Leadership

Team collaboration

Independent working

AI literacy

Education

PhD in Electrical Engineering / related field

Master's degree with ≥5 years experience

Bachelor's degree with ≥7 years experience

Tools

Python

R

SQL

Visual Basic

E3

FDC

RMS

Dashboarding

Job description

Micron Semiconductor Asia Operations Pte Ltd in Singapore seeks a Process Development professional to advance post-fab wafer finishing and AI-enabled manufacturing. You will partner with Package Integration, Front End Wafer Fab, and Quality teams to drive performance, cost, reliability, and schedule targets for next‑gen memory technologies.

You will establish wafer-level processes, evaluate new equipment, analyze data, and deliver robust POR/MOR documentation for production transfer.