Staff Engineer, Package–Silicon Integration (AI-Enabled)

Micron Technology, Inc.; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

Micron Technology, Inc. in Singapore is seeking a Staff Engineer, Package-Silicon Integration to drive CPI risk assessments and lead integration efforts across silicon design, wafer fabrication, package design, and manufacturing.

You will use DOE, statistical analysis, failure analysis, and AI-enabled analytics to accelerate learning, define test plans, and translate findings into design rules and manufacturing controls. This role demands technical leadership and collaboration across teams.

Qualifications

• Bachelor’s degree or higher in Mechanical, Materials, Electrical/Electronic, Chemical, Semiconductor Engineering, Physics, or a related technical discipline.
• Min 4 to 5 years of relevant semiconductor experience in either package-silicon integration, advanced packaging, wafer technology, assembly, reliability, materials, or process development.
• Demonstrated ability to independently lead complex technical investigations.

Responsibilities

• Lead Chip-Package Interaction (CPI) risk assessments for new silicon, package architectures, materials, and processes.
• Partner with silicon, package, wafer fab, and assembly teams to resolve dicing, singulation, die integrity, and integration challenges.
• Lead technical investigations using DOE, statistical analysis, physical characterization, failure analysis, reliability data, and AI-enabled analytical approaches where appropriate.
• Drive root-cause analysis and solutions for yield, quality, reliability, and manufacturability issues.
• Define and execute test vehicles, characterization strategies, process windows, and qualification plans.
• Translate technical learning into design rules, specifications, FMEA controls, and Best-Known Methods (BKMs).
• Leverage AI, automation, and data analytics to improve engineering efficiency, technical insight, knowledge capture, and decision-making.
• Drive technology readiness and transition of new silicon and package technologies into manufacturing.
• Identify integration and capability gaps and develop scalable technical solutions.
• Communicate technical risks, findings, and recommendations across engineering teams and leadership.
• Provide technical guidance and mentoring while promoting effective AI-enabled ways of working.

Skills

CPI risk assessment

Wafer mechanics

Die integrity

Package assembly

Characterization

Failure analysis

Reliability

Data analytics

Automation/AI-enabled tools

Engineering leadership

Education

Bachelor's degree or higher in Mechanical/Materials/Electrical/Physics/ semiconductor engineering

Job description

Micron Technology, Inc. in Singapore is seeking a Staff Engineer, Package-Silicon Integration to drive CPI risk assessments and lead integration efforts across silicon design, wafer fabrication, package design, and manufacturing.

You will use DOE, statistical analysis, failure analysis, and AI-enabled analytics to accelerate learning, define test plans, and translate findings into design rules and manufacturing controls. This role demands technical leadership and collaboration across teams.