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MTS Test Engineer, MBIST Test Content Specialist

ADVANCED MICRO DEVICES (SINGAPORE) PTE LTD

Singapore

On-site

SGD 60,000 - 80,000

Full time

Today
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Job summary

A global semiconductor company in Singapore seeks a Test Engineer to lead test solutions for next-generation products. You'll develop and execute test plans, optimize yield, and work closely with global teams. Required skills include technical leadership, problem-solving, and expertise in test methodologies. A Bachelor's or Master's in Electrical/Electronic Engineering is needed. The role offers a dynamic environment focusing on innovation and collaboration.

Qualifications

  • Experience in the Semiconductor industry.
  • Strong DFT and ATE test methodologies.
  • MBIST test pattern development experience.
  • Pre-silicon simulation and debug experience.
  • Microprocessor architecture and System-on-chip (SOC) knowledge.

Responsibilities

  • Develop characterization and test coverage strategies/plans during pre-silicon phase.
  • Establish pattern requirements and drive Design Verification deliveries during pre-silicon phase.
  • Execute the defined characterization and test plans on new silicon.
  • Deliver optimized test and product definitions across PVT corners.
  • Perform new device characterization and interpret findings.
  • Interface with global teams on root cause resolution for device failures.
  • Foster and develop new ideas/concepts in device test/debug/DFT/DFM.

Skills

Technical development passion
Team player
Problem solving and troubleshooting
Effective communication
Multi-tasking skills
Market savvy
Coding in Python/Ruby/Java/Perl/C++

Education

Bachelors/Masters in Electrical/Electronic Engineering

Tools

Mentor EDA
Synopsys EDA
Cadence EDA
Advantest 93k
T2K platform
Job description
THE ROLE:

The Test Engineer is responsible for the test solution for a next-generation AMD Product. This position serves as the Test Engineering team's Technical Leader and go-to expert for solutions. This position requires engagement with Product, Design, Platform Engineering, Device Analysis, Foundry, Quality and Reliability Engineering to drive test and characterization plan, 1st silicon bring‑up, silicon debug, attainment and optimization of yield and performance distributions, test costs and product quality for next‑generation AMD products.

THE PERSON:

We are looking for someone with a passion towards technical development, possesses broad technical leadership, critical problem solving and troubleshooting skills. The person must be a team player and have good and effective communications to deep dive into technical discussion with other members across the globe and use data to illustrate their points.

This person is expected to be independent, self‑starter, well organized and have the sense of responsibility to see projects through beginning to the end. This person is expected to be market savvy and comfortable in a multi‑tasking environment.

KEY RESPONSIBILITIES:

Key responsibilities for this role will differ according to the product life cycle and are as below:

New product introduction phase:

  • Developing characterization and test coverage strategies/plans during pre‑silicon phase
  • Establishing pattern requirements and driving Design Verification deliveries during pre‑silicon phase
  • Executing the defined characterization and test plans on new silicon
  • Delivery of optimized test and product definitions across PVT corners to meet business requirements.
  • Perform new device characterization, circuit sensitivity analysis, interpret findings, guide deep‑dive investigations to root‑cause, and/or provide mitigation actions.
  • Interface with global teams across the organization on root cause resolution for device failures.
  • Foster and develop new ideas/concepts in device test/debug/DFT/DFM and follow‑through to deliverable outcomes.

Product health and cost target attainment during production phase:

  • Optimize test contents to meet/exceed business goal
  • Lead effort to optimize yield to meet business requirements, from Fab to Back‑end‑Test.
PREFERRED EXPERIENCE:
  • Experience in the Semiconductor industry
  • Experience must include technical and specialized knowledge in the areas below:
  • Strong DFT and ATE test methodologies
  • MBIST test pattern development, Pre‑silicon simulation and debug experience
  • Experience with Mentor / Synopsys / Cadence EDA
  • Strong ATE & test class/method development experience with Advantest 93k and/or T2K platform preferred
  • Microprocessor architecture and System‑on‑chip (SOC)
  • Strong Python/Ruby/Java/Perl/C++ coding skills
ACADEMIC CREDENTIALS:
  • Bachelors/Masters in Electrical/Electronic Engineering
LOCATION:

Singapore

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