IC Layout Engineer

ASTRAWAVE TECHNOLOGY PTE. LTD.; Singapore; On-site; SGD 80,000 - 100,000; Full time

Job summary

A tech company specializing in chip development is seeking experienced analog mixed signal layout and CAD designers in Singapore. The role involves working closely with circuit design engineers to optimize layouts, ensuring the designs meet specifications. Candidates should have a relevant diploma or degree in Microelectronics and be motivated team players. Fresh graduates are encouraged to apply. The position supports the development of high-speed/RF solutions, emphasizing collaboration in a multi-cultural setting.

Qualifications

• Strong commitment to schedules and the ability to work in a multi-cultural environment.
• Knowledge of AMS layout fundamentals is important.
• Fresh graduates are welcome.

Responsibilities

• Realise layout design from schematic presentation.
• Conduct floor planning and device placement to optimize layouts.
• Ensure compliance with DRC rules and LVS requirements.

Skills

Circuit design collaboration

Layout design

Multi-cultural teamwork

Education

Relevant diploma/degree in Microelectronics

Diploma or bachelor's in electrical/computer/electronics engineering

Job description

Job Description

The Role

ASTRAWAVE develops chips for Data Processing, IP Licensing, Network, Bus, Chiplet Interconnect as well as Chip Customisation for different customers. We are currently seeking experienced analog mixed signal layout and CAD designers to join our team in the development of high-speed/RF solutions which will be used to complement our current products.

The Person

Work closely with circuit design engineers to optimise layout to meet specifications. Team player and strong commitment to schedules. Able to work in a multi-cultural environment.

Key Responsibilities

Realise layout design from schematic presentation.

Layout design implementation includes the following functions:

• Floor planning and device placement
• Power and Signal routings and Integrity optimisation
• DRC/LVS/ERC/ANT/ESD/PERC/LVL and necessary Physical Verification
• Passing DRC rules and ensuring LVS
• Preparing material and reviewing layout
• Checklist/Methodology to ensure quality of layout
• Layout methodology and enhancement
• Participate in post layout adjustments and block/IP activities
• Good understanding of AMS layout fundamentals/EMIR/RC delay/DecouplingCaps/Latch-up

Preferred Experience

Fresh graduate with a relevant diploma/degree in Microelectronics.

Academic Credentials

Diploma or bachelor’s in electrical/computer/electronics engineering or equivalent.

Location: Engineer • D01 Cecil, Marina, People’s Park, Raffles Place, SG