Sr Staff FPGA Engineer

Synopsys; Moreira; On-site; EUR 70,000 - 100,000; Full time

Job summary

Synopsys Porto is seeking an experienced FPGA engineer to design high-performance PCIe solutions. You will contribute across the full RTL lifecycle from architecture through timing closure and hardware bring-up, delivering reliable prototypes on aggressive schedules.

You will collaborate with hardware, software, and verification teams, apply structured debugging, and participate in industry compliance activities.

Qualifications

• Bachelor's or Master's in Electrical/Computer Engineering or equivalent hands-on experience.
• 8+ years FPGA design and development experience with shipping designs.
• Strong Verilog RTL design skills and timing closure know-how.

Responsibilities

• Prototype and optimize PCIe-based designs on FPGA platforms using Vivado.
• Simulate and verify designs using UVM and related methodologies.
• Perform timing analysis across clock domains to meet targets.
• Collaborate with hardware, software and verification teams to define requirements.
• Develop test plans to validate functionality and reliability of FPGA prototypes.
• Participate in PCI-SIG compliance testing and resolve issues.

Skills

Verilog

RTL design

PCIe

Multi-clock domain design

Debugging hardware

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

Vivado

Python

Tcl

Job description

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You bring extensive experience designing FPGA solutions that meet rigorous performance and reliability standards in production environments. Your approach to RTL architecture reflects a deep understanding that early design decisions have lasting implications for maintainability and long-term success. You have developed the technical judgment to balance competing constraints and deliver solutions that satisfy both immediate requirements and future scalability needs.

You are comfortable working across the full FPGA development lifecycle, from architecture definition through timing closure and hardware validation. When faced with ambiguity, you apply structured problem-solving methods to clarify requirements and establish clear paths forward. At Synopsys, you will contribute to FPGA solutions that enable advanced semiconductor development workflows.

What You'll Be Doing

• Prototype and optimize high-performance PCIe-based designs on FPGA platforms using Vivado, driving the implementation flow through synthesis, place and route, timing closure, and hardware bring-up
• Simulate and verify PCIe-based prototype designs using industry-standard verification methodologies such as UVM, ensuring correct functionality and behavior prior to FPGA implementation and hardware bring-up
• Perform timing analysis and optimization across multiple clock domains, resolving setup and hold violations and ensuring designs meet performance targets
• Collaborate with hardware, software, and verification teams to define requirements, evaluate design tradeoffs, and deliver FPGA solutions that meet project goals
• Develop and execute test plans to validate functionality, performance, and reliability of FPGA prototypes in real-world conditions
• Participate in industry events, including PCI-SIG Compliance Workshops, to perform official compliance testing of PCIe prototypes and ensure conformance with applicable PCIe specifications and industry standards
• Debug and resolve hardware, protocol, and system-level issues identified during PCIe compliance testing, working across the FPGA prototype and test environment to achieve successful compliance results

The Impact You Will Have

• Enable faster product development cycles by delivering reliable, high-performance FPGA prototypes that allow hardware and software teams to validate complex PCIe designs ahead of silicon availability
• Identify integration, functional and implementation issues early through FPGA prototyping
• Strengthen Synopsys' reputation for technical excellence by attending and getting certifications at industry compliance events
• Improve cross-team productivity by providing clear documentation, responsive support, and designs that integrate cleanly with adjacent systems
• Drive continuous improvement by bringing new techniques, tools, and standards into the team's design and verification processes

What You'll Need

• Bachelor's or Master's in Electrical Engineering, Computer Engineering, or equivalent hands-on experience
• Ideally 8+ years of FPGA design and development experience, with a strong track record of shipping working designs
• Deep proficiency in Verilog and RTL design, including experience with complex state machines, pipelines, and multi-clock domain architectures
• Strong command of Vivado or similar FPGA toolchains, including synthesis, implementation, and timing closure workflows
• Solid understanding of digital design fundamentals: clock domain crossings, metastability, timing constraints, and static timing analysis
• Experience with high-speed interfaces such as PCIe or Ethernet, including protocol-level understanding and debug
• Experience with scripting languages like Python or Tcl for automation and tooling is a plus

Who You Are

• You communicate complex technical concepts clearly to colleagues across engineering disciplines, adapting your approach based on audience technical depth
• You apply systematic debugging methodologies when designs behave differently in hardware versus simulation, identifying root causes efficiently
• You manage multiple concurrent priorities effectively while maintaining attention to critical details in constraint files, test coverage, and documentation
• You contribute constructively to technical discussions, raising concerns about requirements or timelines when appropriate and offering alternative approaches
• You recognize that comprehensive documentation and well-commented code are essential for team knowledge transfer and long-term maintainability
• You work effectively with geographically distributed teams, coordinating across time zones to support collaborative development and integration activities

The Team You'll Be Part Of

You will join a dynamic engineering team in Porto focused on developing state-of-the-art FPGA solutions for high-performance PCIe applications. The team collaborates across disciplines, combining expertise in hardware, software, and system integration to deliver products that set industry standards. You will work alongside talented professionals who value creativity, knowledge sharing, and continuous improvement. Together, you will play a pivotal role in advancing Synopsys' leadership in semiconductor technology and digital hardware innovation.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.