Asic Digital Design, Staff Engineer

Synopsys; Viseu; Presencial; EUR 70 000 - 100 000; Tempo integral

Vantagens oferecidas por esta oferta de emprego

Health benefits

Wellness programs

Financial rewards

Resumo da oferta

Synopsys Porto-based team seeks a senior validation engineer for embedded software and FPGA IP validation, driving process improvements and safety compliance. You will create repeatable workflows, lead audits, and collaborate with IP engineering, automotive customers, and product groups.

Qualifications include a strong background in ISO 9001/IATF 16949, ISO 26262, and hands-on experience with FMEA/FMEDA. The role emphasizes Lean/Six Sigma methods and cross-disciplinary leadership.

Qualificações

• Experience implementing and auditing QMS under ISO 9001:2015 or IATF 16949 with drive for compliance.
• Formal ISO 26262 training with practical delivery of Safety Concepts, Safety Plans, FMEA/FMEDA.
• Background in both hardware and software validation within semiconductor/embedded domains.
• Lean, Six Sigma or similar continuous improvement methodologies applied in engineering or manufacturing.

Responsabilidades

• Implement and maintain IP validation processes for embedded software and FPGA IP validation.
• Deploy IP Product Development Processes under ISO standards with cross‑functional collaboration.
• Conduct process audits, gap assessments and drive root‑cause corrective actions using KPI data.
• Develop safety work products: Safety Goals, Technical Safety Concepts, Safety Plans per ISO 26262.

Conhecimentos

Quality management

ISO 9001:2015

IATF 16949

Functional Safety

Software/semiconductor validation

Lean Six Sigma

Formação académica

Bachelor’s in Industrial/Mechanical/Electrical Eng.

Master’s in relevant field

Ferramentas

FMEA

FMEDA

Safety Case

ISO 26262 concepts

Descrição da oferta de emprego

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. You Are

You have spent years at the intersection of quality systems and semiconductor engineering, and you understand that a validation process is only as good as the defects it catches before they reach a customer. You know the difference between a checklist that gets filled out and a quality gate that actually stops bad work from moving forward, and you care deeply about building the second kind.

You are comfortable sitting in a room with FPGA engineers discussing a prototype bring-up issue and walking out with a process improvement that prevents the same failure mode across three product lines. Functional safety is not abstract compliance work to you. You have written Technical Safety Concepts, managed FMEA sessions, and shepherded embedded software through ISO 26262 reviews. You know what ASIL D actually requires and how to translate that into actionable engineering work.

At Synopsys, you will work on IP products that power everything from automotive displays to high-speed storage controllers, and the processes you build will shape how dozens of IP products reach the market.

What You'll Be Doing

• Implement and maintain IP validation processes for embedded software design and FPGA-based IP validation, including workflows, templates, checklists, and quality gate reviews across validation phases
• Deploy and continuously improve Synopsys IP Product Development Processes under ISO 9001:2015 and applicable IATF 16949 clauses, ensuring compliance across the organization
• Conduct process audits and gap assessments, then drive root-cause analysis and corrective actions using real KPIs and quality metrics, not vanity dashboards
• Develop and manage functional safety work products for automotive IP software drivers, including Safety Goals, Item Definitions, Technical Safety Concepts, and Safety Plans aligned with ISO 26262 up to ASIL D
• Review and approve architecture proposals, design verification plans, and safety validation strategies to ensure they meet both functional and safety requirements
• Coordinate with IP engineering teams, automotive customers, and product groups to align validation processes with functional safety, quality, and reliability targets
• Lead continuous improvement initiatives using Lean, Six Sigma, or similar methodologies to eliminate waste and reduce defect escape rates across IP validation workflows

The Impact You Will Have

You will build repeatable validation processes and safety templates that scale across multiple DesignWare IP product lines, reducing rework and accelerating time to market. Your quality gates will catch integration issues and safety gaps before they reach FPGA prototypes or customer silicon, preventing costly late-stage fixes. You will enable Synopsys IP software drivers to meet ASIL D certification requirements, unlocking adoption in safety-critical automotive systems like ADAS and autonomous driving platforms. Your process audits and KPI tracking will surface systemic issues early, giving engineering leadership the visibility they need to make informed tradeoffs. You will ensure that safety documentation evolves with the product, not as an afterthought, maintaining compliance across product updates and customer engagements. Your work will directly enhance customer trust in Synopsys IP by demonstrating rigorous validation and safety assurance in every release. You will shape how Synopsys IP validation teams operate, creating a culture where quality and safety are built into the workflow, not bolted on at the end.

What You'll Need

• Bachelor's degree in Industrial, Mechanical, or Electrical Engineering with 5+ years of experience, or Master's degree with 3+ years of experience in Process Quality Excellence, Industrial Engineering and Management, Functional Safety, or Automotive Engineering
• Hands‑on experience implementing and auditing quality management systems under ISO 9001:2015 or IATF 16949, with demonstrated ability to drive compliance and process improvement
• Solid understanding of software and semiconductor development flows, with background in both hardware and software validation functions
• Formal training in ISO 26262 with practical experience creating key work products such as Technical Safety Concept, Safety Plan, FMEA, FMEDA, Safety Manual, and Safety Case is highly valued
• Experience as a Functional Safety Manager or Engineer qualifying embedded software or hardware up to ISO 26262 ASIL D in safety‑critical applications is a strong differentiator
• Knowledge of IC design flows is a plus, experience with MIPI, PCIe, UFS, HDMI, or DisplayPort protocols is beneficial
• Familiarity with Lean, Six Sigma, or similar continuous improvement methodologies applied in engineering or manufacturing environments

Who You Are

You treat safety documentation as a living part of the product, not a compliance artifact, and you know how to maintain it across product updates and customer revisions. You push back when a process is too vague or a quality gate is missing its teeth, and you do it in a way that builds alignment rather than friction. You are comfortable managing multiple validation streams and safety reviews simultaneously without dropping threads or letting quality slip. You do not need perfect information to move forward, you work with what engineering gives you, ask the right follow-up questions, and build systems that improve over time. You are detail‑oriented and methodical, but you know when to stop refining and start deploying, because a good process in production beats a perfect process on paper.

Team You'll Be Part Of

You will be part of the Synopsys IP Validation team based in the Porto office in Portugal, working to validate multiple Synopsys Interface IP products such as MIPI display and camera, UFS flash, PCIe, HDMI, and DisplayPort controller and PHYs. Your team is responsible for validating, in real world or emulated scenarios, multiple Synopsys Interface IP products which are designed and verified by IP R&D teams of experts, but whose validation scope in simulation is limited even when following best-in-class verification methodologies like UVM.

Your team provides that extra validation layer, with expertise in HW/SW Prototyping and Testing, FPGA Design, SW Drivers, and Test Automation. You build IP validation systems, typically FPGA-based hardware and software prototypes of Synopsys Controller and PHY Interface IPs, running at speed, where conformance with leading‑edge industry standards and additional test requirements is verified and approved.

You play a vital role in supporting Synopsys Interface IP business by validating key features and mitigating ASIC potential faults early on.

Rewards and Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non‑monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process. At Synopsys, we want talented people of every background to feel valued and supported to do their best work. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, age, military veteran status, or disability.

Asic Digital Design, Staff Engineer Maia, Portuguese Republic, PT