Senior ASIC Verification Engineer – HBM & PCIe

Synopsys, Inc.; Porto; Hybrid; EUR 45.000 - 70.000; Vollzeit

Benefits dieser Stelle

Health benefits

Wellness programs

Financial benefits

Zusammenfassung

Synopsys, Inc. is seeking an experienced ASIC Digital Verification Engineer to develop verification plans and execute strategies for HBM-based ASIC designs. You will build & maintain test benches, collaborate with design teams, and verify functionality and performance to ensure specifications are met.

Ideal candidates have extensive ASIC verification experience, proficiency in UVM and SystemVerilog, and strong debugging skills to deliver robust, high-quality silicon and software content.

Qualifikationen

• Proven track record in ASIC verification projects.
• Experience with HBM-based designs and verification.
• Strong debugging and problem-solving skills.

Aufgaben

• Develop verification plans and strategies for HBM-based ASIC designs.
• Create and maintain test benches, test cases, and verification environments.
• Collaborate with design and architecture teams to understand specifications.
• Perform functional and performance verification to meet specs.
• Debug issues and implement fixes with design teams.

Kenntnisse

ASIC digital verification

HBM protocols

UVM

SystemVerilog

Simulation environments

Tools

UVM

SystemVerilog

Simulation tools

Jobbeschreibung

Synopsys, Inc. is seeking an experienced ASIC Digital Verification Engineer to develop verification plans and execute strategies for HBM-based ASIC designs. You will build & maintain test benches, collaborate with design teams, and verify functionality and performance to ensure specifications are met.

Ideal candidates have extensive ASIC verification experience, proficiency in UVM and SystemVerilog, and strong debugging skills to deliver robust, high-quality silicon and software content.