Hybrid Analog Layout Engineer - From Floorplan to Tape-Out

Caravel Semiconductor; Porto; Hybrid; EUR 40,000 - 70,000; Full time

Benefits offered by this job

Hybrid work schedule

Job summary

Caravel Semiconductor in Porto, Portugal, is seeking an analog layout engineer to turn designs into silicon-ready layouts—from floorplan to tape-out-clean GDS. You will own layout of LDOs, references, amplifiers, PLLs and RF blocks, collaborating closely with circuit designers.

We offer hybrid work (two days a week in Porto, remaining remote) and a path to impact across regulators, references, PLLs, RF and data converters.

Qualifications

• BSc or MSc in Electrical Engineering, Microelectronics or related field.
• 1–5 years hands-on analog layout experience.
• Solid grasp of analog layout fundamentals: matching, parasitics, latch-up, ESD, electromigration and IR drop, DFM.
• Experience with full-custom layout flow and verification tools (Calibre, PVS).
• Good written and spoken English.
• Based in, or willing to relocate to, the Porto area.

Responsibilities

• Layout analog and mixed-signal blocks from floorplan to final GDS: matching, symmetry, common-centroid and interdigitated structures, guard rings, shielding.
• Plan floorplans with the designer: pin placement, current paths, IR drop and electromigration.
• Run and close physical verification: DRC, LVS, antenna, density and extract parasitics to iterate on post-layout results with the designer.
• Build top-level integration: block abutment, power and ground routing, pad ring and ESD, chip finishing (seal ring, fill, metal density).
• Help set up PDKs and layout tools for new projects together with the design team.

Skills

Analog layout

Full-custom flow

English

Education

BSc/MSc in Electrical Engineering

Tools

Cadence Virtuoso Layout

Synopsys Custom Compiler

Calibre

PVS

Job description

Caravel Semiconductor in Porto, Portugal, is seeking an analog layout engineer to turn designs into silicon-ready layouts—from floorplan to tape-out-clean GDS. You will own layout of LDOs, references, amplifiers, PLLs and RF blocks, collaborating closely with circuit designers.

We offer hybrid work (two days a week in Porto, remaining remote) and a path to impact across regulators, references, PLLs, RF and data converters.