Senior Principal Engineer, Memory Layout & Tapeout

micron; Xalisco; Presencial; MXN 1.800.000 - 3.000.000; Jornada completa

Descripción de la vacante

Micron Technology seeks a Lead Principal Engineer, Layout Design to lead the physical realization of memory products. You will interpret device specs, develop hierarchical layouts, and optimize die size, timing, and power while coordinating with cross-functional teams to meet tapeout milestones.

Expect to drive verification, ECOs, and documentation, with a focus on reliability and manufacturability in a fast-paced memory technology environment.

Formación

• 10+ years in the semiconductor industry with layout experience.
• Fluency in CMOS devices and layout-dependent effects.
• Hands-on IC layout and physical verification tool experience.
• Reliability checks and layout constraints understanding.
• Experience leading technical execution and tapeouts.
• Scripting to improve layout efficiency.

Responsabilidades

• Lead layout build and physical realization of new memory products.
• Interpret device and circuit specs to meet PPA and reliability targets.
• Develop hierarchical layouts for analog, digital, and memory arrays.
• Build floorplans optimizing placement, routing, power, and manufacturability.
• Optimize for die size, matching, noise, and timing.
• Produce layout collateral and documentation for cross-team integration.
• Run and debug physical verification flows and closures.
• Perform parasitic extraction and assess timing/power/noise impact.
• Resolve layout issues related to signal integrity and power integrity.

Conocimientos

Semiconductor industry exp

CMOS layout

EDA tools

Scripting/automation

Leadership/coordination

Educación

Bachelors in Electrical/Computer Engineering

Masters/PhD preferred

Herramientas

EDA tools

Descripción del empleo

Micron Technology seeks a Lead Principal Engineer, Layout Design to lead the physical realization of memory products. You will interpret device specs, develop hierarchical layouts, and optimize die size, timing, and power while coordinating with cross-functional teams to meet tapeout milestones.

Expect to drive verification, ECOs, and documentation, with a focus on reliability and manufacturability in a fast-paced memory technology environment.