Senior Layout Engineer

Micron Technology; Tlaquepaque; Presencial; USD 3259 - 5432; Jornada completa

Descripción de la vacante

Join a forward-thinking company as a DRAM Engineering Group Layout Designer, where your expertise in circuit design and layout methodologies will shape the future of memory and storage solutions. In this pivotal role, you will translate schematics into precise layouts, ensuring that all engineering criteria are met for innovative DRAM products. Collaborate with design engineers and lead projects that push the boundaries of technology, all while contributing to a culture of continuous improvement and professional development. If you're ready to make a significant impact in the semiconductor industry, this opportunity is for you.

Formación

• 10+ years of experience in Cadence VLE/VXL and Calibre DRC/LVS is essential.
• Strong understanding of circuit design and layout methodologies.

Responsabilidades

• Translate schematics into layouts for DRAM products.
• Lead projects to support technical innovation and manage resources.

Conocimientos

Cadence VLE/VXL

Calibre DRC/LVS

Circuit Design Understanding

Design for Manufacturing (DFM)

Optical Proximity Correction (OPC)

Educación

BE in Electronic Engineering

MTech in VLSI Engineering

Related degree in Mechatronics

Descripción del empleo

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Our vision is to transform how the world uses information to enrich life for all.

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

As a DRAM Engineering Group Design Technology (DEGDT) Layout Designer at Micron Technology, Inc., you will be responsible for translating schematics into layout used for the creation of fabrication reticules. You will be required to meet all engineering and process-related criteria needed for an assigned DRAM product. You will organize and prioritize logistics and resource allocations to meet scheduled deadlines. In this role, you will contribute with expert technical knowledge to advance innovative technical solutions and proactively develop methodologies. You will work with Design and other engineering groups to shape strategic decisions and provide advice and counsel to management. You will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tape out processes and procedures.

Role and Responsibilities

• +10 years of experience in Cadence VLE/VXL and Calibre DRC/LVS is a must.
• Work with Design Engineers to floor plan and design layout.
• Understand and follow verification protocols.
• Apply custom and/or automated layout techniques to design pitch, array, and peripheral layout for digital and analog circuits.

Develop and Maintain Technical Knowledge

• Interface with design engineering to understand layout methodology.
• Possess good understanding of circuit design.
• Understand tape out processes and procedures.
• Provide solutions to high complex problems.
• Fab process knowledge, including Design for Manufacturing (DFM) and Optical Proximity Correction (OPC).

Manage and Participate in Project-Based Environment

• Leads projects to support technical innovation.
• Organize, prioritize, and manage logistic and resource allocations.
• Prioritize tasks to attain schedules and deadlines.
• Proactively develop methodologies to resolve issues.
• Guide layout designers to encourage professional and technical development.

Education

BE or MTech in Electronic/VLSI Engineering or related / Mechatronics.

Seniority Level

Mid-Senior level

Employment Type

Full-time

Industries

Semiconductor Manufacturing

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