HBM Layout Engineering Manager

micron; Xalisco; Presencial; MXN 1.800.000 - 2.800.000; Jornada completa

Descripción de la vacante

Micron Technology in Guadalajara, Mexico, is seeking a Layout Design Engineering Manager to lead a distributed team crafting analog, mixed‑signal, and custom layouts for next‑gen AI and HPC solutions.

You will oversee layout verification, meet project milestones, mentor engineers, and collaborate with worldwide teams to deliver high‑quality block layouts across multiple tapeouts.

Ideal candidates have 15+ years in analog/custom layout, 5+ years leading teams, and deep Cadence/Calibre expertise.

Formación

• 15+ years in analog/custom layout design in advanced CMOS nodes (Planar, FinFET).
• 5+ years managing layout engineering teams.
• Proven ability to lead layout development with strong quality oversight.
• Bachelor’s or Master’s in Electronics, VLSI, or related field.
• Expertise with Cadence VLE/VXL and Mentor Calibre DRC/LVS.
• Hands-on experience with IP blocks (PLL, ADC, DAC, thermistors, etc.).
• Strong fundamentals in parasitics, EM, latch-up, crosstalk, IR drop.

Responsabilidades

• Manage a team responsible for layouts for analog, mixed-signal, and block-level integration.
• Oversee LVS, DRC, Antenna checks, documentation and quality reviews.
• Ensure timely, high-quality delivery of block-level layouts meeting project requirements.
• Coordinate planning, area/time estimation, scheduling, task delegation, and execution for multiple projects.
• Mentor and guide layout engineers of all levels.
• Perform detailed reviews of sub-block layouts.
• Collaborate with global teams to align on project execution.

Conocimientos

Analog layout design

Layout management

Team leadership

Cadence VLE/VXL

Mentor graphics Calibre

IP blocks experience

Planar/FinFET

Tapeouts management

Electromigration/signal integrity

Layout verification leadership

Educación

Bachelor's in Electronics/VLSI

Master's in Electronics/VLSI

Herramientas

Cadence VLE/VXL

Mentor Calibre

Descripción del empleo

Micron Technology in Guadalajara, Mexico, is seeking a Layout Design Engineering Manager to lead a distributed team crafting analog, mixed‑signal, and custom layouts for next‑gen AI and HPC solutions.

You will oversee layout verification, meet project milestones, mentor engineers, and collaborate with worldwide teams to deliver high‑quality block layouts across multiple tapeouts.

Ideal candidates have 15+ years in analog/custom layout, 5+ years leading teams, and deep Cadence/Calibre expertise.