HBM Layout Design Engineer for AI/HPC

Micron; Región Centro; On-site; MXN 420,000 - 640,000; Full time

Job summary

Micron Technology in Guadalajara, Mexico, is hiring a Layout Design engineer for the HBM team. You will craft IC layouts for leaf cells, standard cells, and sub-blocks, ensuring performance, power, and area targets are met.

You will collaborate with global teams and verify layouts using DRC/LVS results. The role requires a strong electronics foundation, knowledge of circuit design tools, and good English communication.

Qualifications

• Bachelor’s, master’s, or PhD in Electronics, Mechatronics, Robotics, Nanotech or related field.
• Graduation from program within the past two years.
• Strong understanding of electronic circuit concepts and proficiency in design tools.

Responsibilities

• Craft and develop IC layouts for leaf cells, standard cells, and sub-blocks with attention to performance, power, area, capacitance, and design efficiency.
• Interpret DRC/LVS and other physical verification results to support accurate layouts.
• Apply a systematic, detail-focused approach to problem solving and verification while planning work efficiently.
• Collaborate with internal teams across global locations to drive layout projects.
• Continue to learn semiconductor design skills and contribute to AI/HBM solutions.

Skills

Circuit concepts

Circuit simulation/tools

Interpersonal skills

English proficiency

Motivation to learn

Education

Electronics/related degree

Tools

Cadence VLE/VXL

Calibre DRC/LVS

Python

C++

Job description

Micron Technology in Guadalajara, Mexico, is hiring a Layout Design engineer for the HBM team. You will craft IC layouts for leaf cells, standard cells, and sub-blocks, ensuring performance, power, and area targets are met.

You will collaborate with global teams and verify layouts using DRC/LVS results. The role requires a strong electronics foundation, knowledge of circuit design tools, and good English communication.